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AMDGPU: Fix incorrect simm check
ClosedPublic

Authored by jvesely on May 18 2016, 11:42 AM.

Reviewers

• tstellarAMD
arsenm

Commits

Summary

Use signed division otherwise all back jumps fail the check
Fixes regression introduced in r269951

jvesely retitled this revision from to AMDGPU: Fix incorrect simm check.

jvesely updated this object.

jvesely set the repository for this revision to rL LLVM.

jvesely added a subscriber: llvm-commits.

LGTM

This revision is now accepted and ready to land.May 18 2016, 11:54 AM

This revision was automatically updated to reflect the committed changes.

Path

Size

llvm/

trunk/

lib/

Target/

AMDGPU/

MCTargetDesc/

2 lines

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	}			}

	void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,			void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
	unsigned DataSize, uint64_t Value,			unsigned DataSize, uint64_t Value,
	bool IsPCRel) const {			bool IsPCRel) const {

	switch ((unsigned)Fixup.getKind()) {			switch ((unsigned)Fixup.getKind()) {
	case AMDGPU::fixup_si_sopp_br: {			case AMDGPU::fixup_si_sopp_br: {
	int64_t BrImm = (Value - 4) / 4;			int64_t BrImm = ((int64_t)Value - 4) / 4;
	if (!isInt<16>(BrImm))			if (!isInt<16>(BrImm))
	report_fatal_error("branch size exceeds simm16");			report_fatal_error("branch size exceeds simm16");

	uint16_t Dst = (uint16_t)(Data + Fixup.getOffset());			uint16_t Dst = (uint16_t)(Data + Fixup.getOffset());
	*Dst = BrImm;			*Dst = BrImm;
	break;			break;
	}			}

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