[PowerPC] Fix the EH_SjLj_Setup pseudo.

[• koriakin]

Summary

This instruction is just a control flow marker - it should not
actually exist in the object file. Unfortunately, nothing catches
it before it gets to AsmPrinter. If integrated assembler is used,
it's considered to be a normal 4-byte instruction, and emitted as
an all-0 word, crashing the program. With external assembler,
a comment is emitted.

Fixed by setting Size to 0 and handling it in MCCodeEmitter - this
means the comment will still be emitted if integrated assembler
is not used.

This broke an ASan test, which has been disabled for a long time
as a result (see the discussion on D19657). We can reenable it
once this lands.

[hfinkel]

Can you construct a test case by running llc with -filetype=obj, and then llvm-objdump (or llvm-mc --disassemble or whatever works)?

lib/Target/PowerPC/PPCInstrInfo.td

1406–1409

Please add a comment explaining that this pseudo instruction is never removed from the function because it serves as a terminator, and we set size to 0 to prevent the builtin assembler from emitting it.

[• koriakin]

Added comment and test.

[hfinkel]

LGTM.

[• koriakin]

Closed by rL267943 (forgot to add phab link).

lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp

void encodeInstruction(const MCInst &MI, raw_ostream &OS,
     unsigned Opcode = MI.getOpcode();
     const MCInstrDesc &Desc = MCII.get(Opcode);
 
     uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
 
     // Output the constant in big/little endian byte order.
     unsigned Size = Desc.getSize();
     switch (Size) {
+    case 0:
+      break;
     case 4:
       if (IsLittleEndian) {
         support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);
       } else {
         support::endian::Writer<support::big>(OS).write<uint32_t>(Bits);
       }
       break;
     case 8:

lib/Target/PowerPC/PPCInstrInfo.td

def EH_SjLj_SetJmp32  : Pseudo<(outs gprc:$dst), (ins memr:$buf),
                           Requires<[In32BitMode]>;
   let isTerminator = 1 in
   def EH_SjLj_LongJmp32 : Pseudo<(outs), (ins memr:$buf),
                             "#EH_SJLJ_LONGJMP32",
                             [(PPCeh_sjlj_longjmp addr:$buf)]>,
                           Requires<[In32BitMode]>;
 }
 
-let isBranch = 1, isTerminator = 1 in {
+// This pseudo is never removed from the function, as it serves as
+// a terminator.  Size is set to 0 to prevent the builtin assembler
+// from emitting it.
+let isBranch = 1, isTerminator = 1, Size = 0 in {
   def EH_SjLj_Setup : Pseudo<(outs), (ins directbrtarget:$dst),
                         "#EH_SjLj_Setup\t$dst", []>;
 }
 
 // System call.
 let PPC970_Unit = 7 in {
   def SC     : SCForm<17, 1, (outs), (ins i32imm:$lev),
                       "sc $lev", IIC_BrB, [(PPCsc (i32 imm:$lev))]>;

test/CodeGen/PowerPC/2016-04-28-setjmp.ll

+; RUN: llc -filetype=obj <%s | llvm-objdump --disassemble - | FileCheck %s
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+@ptr = common global i8* null, align 8
+
+; Verify there's no junk between these two instructions from misemitted
+; EH_SjLj_Setup.
+
+; CHECK: li 3, 1
+; CHECK-NEXT: b .+4
+
+define void @h() nounwind {
+  %1 = load i8**, i8*** bitcast (i8** @ptr to i8***), align 8
+  %2 = tail call i8* @llvm.frameaddress(i32 0)
+  store i8* %2, i8** %1, align 8
+  %3 = tail call i8* @llvm.stacksave()
+  %4 = getelementptr inbounds i8*, i8** %1, i64 2
+  store i8* %3, i8** %4, align 8
+  %5 = bitcast i8** %1 to i8*
+  %6 = tail call i32 @llvm.eh.sjlj.setjmp(i8* %5)
+  %7 = icmp eq i32 %6, 0
+  br i1 %7, label %9, label %8
+
+; <label>:8:                                      ; preds = %0
+  tail call void @g()
+  br label %10
+
+; <label>:9:                                      ; preds = %0
+  tail call void @f()
+  br label %10
+
+; <label>:10:                                     ; preds = %9, %8
+  ret void
+}
+
+; Function Attrs: nounwind readnone
+declare i8* @llvm.frameaddress(i32)
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave()
+
+; Function Attrs: nounwind
+declare i32 @llvm.eh.sjlj.setjmp(i8*)
+
+declare void @g()
+
+declare void @f()