Add optimization bisect opt-in calls for Hexagon passes

[andrew.w.kaylor]

Summary

This patch adds calls to Hexagon-specific passes that can be safely skipped to opt-in to the optimization bisect mechanism.

I selected the passes to be skipped based on the fact that they were not added at CodeGenOpt::None in HexagonTargetMachine.cpp. Based on that criteria, I did not add opt-in calls to the following passes, which appear to be required:

HexagonBranchRelaxation
HexagonCallFrameInformation
HexagonCopyToCombine
HexagonSplitConst32AndConst64

Note that the call to skipFunction() will also check for the "optnone" function attribute, so this can theoretically result in passes being skipped even when optimization bisect is not being done. However, I believe that any pass that can be safely skipped should be skipped for functions with the optnone attribute.

See D19172 for details on the base optimizaton bisect implementation.

[kparzysz]

Looks good to me. Thanks!

llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp

if (FRC->getID() == Hexagon::PredRegsRegClassID) {
       continue;
     }
   }
   return Changed;
 }
 
 
 bool HexagonBitSimplify::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   auto &HST = MF.getSubtarget<HexagonSubtarget>();
   auto &HRI = *HST.getRegisterInfo();
   auto &HII = *HST.getInstrInfo();
 
   MDT = &getAnalysis<MachineDominatorTree>();
   MachineRegisterInfo &MRI = MF.getRegInfo();
   bool Changed;
 
for (unsigned i = 0, n = Groups.size(); i < n; ++i) {
     Changed = true;
   }
 
   return Changed;
 }
 
 
 bool HexagonLoopRescheduling::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   auto &HST = MF.getSubtarget<HexagonSubtarget>();
   HII = HST.getInstrInfo();
   HRI = HST.getRegisterInfo();
   MRI = &MF.getRegInfo();
   const HexagonEvaluator HE(*HRI, *MRI, *HII, MF);
   BitTracker BT(HE, MF);
   DEBUG(BT.trace(true));
   BT.run();

llvm/trunk/lib/Target/Hexagon/HexagonCFGOptimizer.cpp

HexagonCFGOptimizer::InvertAndChangeJumpTarget(MachineInstr* MI,
   }
 
   MI->setDesc(TII->get(NewOpcode));
   MI->getOperand(1).setMBB(NewTarget);
 }
 
 
 bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
+  if (skipFunction(*Fn.getFunction()))
+    return false;
+
   // Loop over all of the basic blocks.
   for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
        MBBb != MBBe; ++MBBb) {
     MachineBasicBlock *MBB = &*MBBb;
 
     // Traverse the basic block.
     MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
     if (MII != MBB->end()) {

llvm/trunk/lib/Target/Hexagon/HexagonCommonGEP.cpp

for (ValueVect::iterator I = Ins.begin(), E = Ins.end(); I != E; ++I) {
       if (isInstructionTriviallyDead(In))
         In->eraseFromParent();
     }
   }
 }
 
 
 bool HexagonCommonGEP::runOnFunction(Function &F) {
+  if (skipFunction(F))
+    return false;
+
   // For now bail out on C++ exception handling.
   for (Function::iterator A = F.begin(), Z = F.end(); A != Z; ++A)
     for (BasicBlock::iterator I = A->begin(), E = A->end(); I != E; ++I)
       if (isa<InvokeInst>(I) || isa<LandingPadInst>(I))
         return false;
 
   Fn = &F;
   DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();

llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp

void HexagonEarlyIfConversion::simplifyFlowGraph(const FlowPattern &FP) {
   // fails on Hexagon for blocks that have EH_LABELs. However, if SB ends
   // with an unconditional branch, we won't need to touch the terminators.
   if (!hasEHLabel(SB) || hasUncondBranch(SB))
     mergeBlocks(FP.SplitB, SB);
 }
 
 
 bool HexagonEarlyIfConversion::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   auto &ST = MF.getSubtarget();
   TII = ST.getInstrInfo();
   TRI = ST.getRegisterInfo();
   MFN = &MF;
   MRI = &MF.getRegInfo();
   MDT = &getAnalysis<MachineDominatorTree>();
   MLI = &getAnalysis<MachineLoopInfo>();
   MBPI = EnableHexagonBP ? &getAnalysis<MachineBranchProbabilityInfo>() :

llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp

for (unsigned i = 0, n = Condsets.size(); i < n; ++i) {
     }
     Changed |= Done;
   }
   return Changed;
 }
 
 
 bool HexagonExpandCondsets::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   HII = static_cast<const HexagonInstrInfo*>(MF.getSubtarget().getInstrInfo());
   TRI = MF.getSubtarget().getRegisterInfo();
   LIS = &getAnalysis<LiveIntervals>();
   MRI = &MF.getRegInfo();
   DEBUG(MF.print(dbgs() << "Before expand-condsets\n", LIS->getSlotIndexes()));
 
   bool Changed = false;
 

llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp

 static bool isHardwareLoop(const MachineInstr *MI) {
   return MI->getOpcode() == Hexagon::J2_loop0r ||
          MI->getOpcode() == Hexagon::J2_loop0i ||
          MI->getOpcode() == Hexagon::J2_loop1r ||
          MI->getOpcode() == Hexagon::J2_loop1i;
 }
 
 bool HexagonFixupHwLoops::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
   return fixupLoopInstrs(MF);
 }
 
 /// \brief For Hexagon, if the loop label is to far from the
 /// loop instruction then we need to set the LC0 and SA0 registers
 /// explicitly instead of using LOOP(start,count).  This function
 /// checks the distance, and generates register assignments if needed.
 ///

llvm/trunk/lib/Target/Hexagon/HexagonGenExtract.cpp

if (Last)
       break;
     I = NextI;
   }
   return Changed;
 }
 
 
 bool HexagonGenExtract::runOnFunction(Function &F) {
+  if (skipFunction(F))
+    return false;
+
   DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
   bool Changed;
 
   // Traverse the function bottom-up, to see super-expressions before their
   // sub-expressions.
   BasicBlock *Entry = GraphTraits<Function*>::getEntryNode(&F);
   Changed = visitBlock(Entry);
 
   return Changed;
 }
 
 
 FunctionPass *llvm::createHexagonGenExtract() {
   return new HexagonGenExtract();
 }

llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp

for (auto I = Instrs.begin(), E = Instrs.end(); I != E; ++I) {
     Changed = true;
   }
 
   return Changed;
 }
 
 
 bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   bool Timing = OptTiming, TimingDetail = Timing && OptTimingDetail;
   bool Changed = false;
   TimerGroup __G("hexinsert");
   NamedRegionTimer __T("hexinsert", Timing && !TimingDetail);
 
   // Sanity check: one, but not both.
   assert(!OptSelectAll0 || !OptSelectHas0);
 

llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp

for (unsigned I = 0, N = ML.size(); I < N; ++I) {
     B.erase(MX.Def2);
     Changed = true;
   }
 
   return Changed;
 }
 
 bool HexagonGenMux::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
   HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
   HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
   bool Changed = false;
   for (auto &I : MF)
     Changed |= genMuxInBlock(I);
   return Changed;
 }
 
 FunctionPass *llvm::createHexagonGenMux() {
   return new HexagonGenMux();
 }

llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp

bool HexagonGenPredicate::eliminatePredCopies(MachineFunction &MF) {
   for (VectOfInst::iterator I = Erase.begin(), E = Erase.end(); I != E; ++I)
     (*I)->eraseFromParent();
 
   return Changed;
 }
 
 
 bool HexagonGenPredicate::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   TII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
   TRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
   MRI = &MF.getRegInfo();
   PredGPRs.clear();
   PUsers.clear();
   G2P.clear();
 
   bool Changed = false;

llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp

INITIALIZE_PASS_END(HexagonHardwareLoops, "hwloops",
                     "Hexagon Hardware Loops", false, false)
 
 FunctionPass *llvm::createHexagonHardwareLoops() {
   return new HexagonHardwareLoops();
 }
 
 bool HexagonHardwareLoops::runOnMachineFunction(MachineFunction &MF) {
   DEBUG(dbgs() << "********* Hexagon Hardware Loops *********\n");
+  if (skipFunction(*MF.getFunction()))
+    return false;
 
   bool Changed = false;
 
   MLI = &getAnalysis<MachineLoopInfo>();
   MRI = &MF.getRegInfo();
   MDT = &getAnalysis<MachineDominatorTree>();
   TII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
 

llvm/trunk/lib/Target/Hexagon/HexagonNewValueJump.cpp

 
 
 bool HexagonNewValueJump::runOnMachineFunction(MachineFunction &MF) {
 
   DEBUG(dbgs() << "********** Hexagon New Value Jump **********\n"
                << "********** Function: "
                << MF.getName() << "\n");
 
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   // If we move NewValueJump before register allocation we'll need live variable
   // analysis here too.
 
   QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo());
   QRI = static_cast<const HexagonRegisterInfo *>(
       MF.getSubtarget().getRegisterInfo());
   MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
 

llvm/trunk/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp

case llvm::Intrinsic::hexagon_A2_addh_l16_sat_ll:
       return true;
     default:
       break;
   }
   return false;
 }
 
 bool HexagonOptimizeSZextends::runOnFunction(Function &F) {
+  if (skipFunction(F))
+    return false;
+
   unsigned Idx = 1;
   // Try to optimize sign extends in formal parameters. It's relying on
   // callee already sign extending the values. I'm not sure if our ABI
   // requires callee to sign extend though.
   for (auto &Arg : F.args()) {
     if (F.getAttributes().hasAttribute(Idx, Attribute::SExt)) {
       if (!isa<PointerType>(Arg.getType())) {
         for (auto UI = Arg.use_begin(); UI != Arg.use_end();) {

llvm/trunk/lib/Target/Hexagon/HexagonPeephole.cpp

 }
 
 char HexagonPeephole::ID = 0;
 
 INITIALIZE_PASS(HexagonPeephole, "hexagon-peephole", "Hexagon Peephole",
                 false, false)
 
 bool HexagonPeephole::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo());
   QRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
   MRI = &MF.getRegInfo();
 
   DenseMap<unsigned, unsigned> PeepholeMap;
   DenseMap<unsigned, std::pair<unsigned, unsigned> > PeepholeDoubleRegsMap;
 
   if (DisableHexagonPeephole) return false;

llvm/trunk/lib/Target/Hexagon/HexagonRDFOpt.cpp

bool HexagonDCE::rewrite(NodeAddr<InstrNode*> IA, SetVector<NodeId> &Remove) {
   if (trace())
     dbgs() << "       to: " << *MI;
 
   return true;
 }
 
 
 bool HexagonRDFOpt::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   if (RDFLimit.getPosition()) {
     if (RDFCount >= RDFLimit)
       return false;
     RDFCount++;
   }
 
   MDT = &getAnalysis<MachineDominatorTree>();
   const auto &MDF = getAnalysis<MachineDominanceFrontier>();

llvm/trunk/lib/Target/Hexagon/HexagonSplitDouble.cpp

bool HexagonSplitDoubleRegs::splitPartition(const USet &Part) {
   return Changed;
 }
 
 
 bool HexagonSplitDoubleRegs::runOnMachineFunction(MachineFunction &MF) {
   DEBUG(dbgs() << "Splitting double registers in function: "
         << MF.getName() << '\n');
 
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   auto &ST = MF.getSubtarget<HexagonSubtarget>();
   TRI = ST.getRegisterInfo();
   TII = ST.getInstrInfo();
   MRI = &MF.getRegInfo();
   MLI = &getAnalysis<MachineLoopInfo>();
 
   UUSetMap P2Rs;
   LoopRegMap IRM;

llvm/trunk/lib/Target/Hexagon/HexagonStoreWidening.cpp

for (auto &G : SGs) {
     Changed |= processStoreGroup(G);
   }
 
   return Changed;
 }
 
 
 bool HexagonStoreWidening::runOnMachineFunction(MachineFunction &MFn) {
+  if (skipFunction(*MFn.getFunction()))
+    return false;
+
   MF = &MFn;
   auto &ST = MFn.getSubtarget<HexagonSubtarget>();
   TII = ST.getInstrInfo();
   TRI = ST.getRegisterInfo();
   MRI = &MFn.getRegInfo();
   AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
 
   bool Changed = false;

llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp

static MachineBasicBlock::iterator moveInstrOut(MachineInstr *MI,
   SingleI->unbundleFromPred();
   assert(!SingleI->isBundledWithSucc());
   BundleIt->eraseFromParent();
   return NextIt;
 }
 
 
 bool HexagonPacketizer::runOnMachineFunction(MachineFunction &MF) {
-  if (DisablePacketizer)
+  if (DisablePacketizer || skipFunction(*MF.getFunction()))
     return false;
 
   HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
   HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
   auto &MLI = getAnalysis<MachineLoopInfo>();
   auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
   auto *MBPI = &getAnalysis<MachineBranchProbabilityInfo>();