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docs/AMDGPUUsage: Update assembly example
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Authored by • tstellarAMD on Feb 19 2016, 12:04 PM.

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nhaustov
arsenm

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• tstellarAMD retitled this revision from to docs/AMDGPUUsage: Update assembly example.

• tstellarAMD updated this object.

LGTM

This revision is now accepted and ready to land.Feb 22 2016, 9:12 AM

This revision was automatically updated to reflect the committed changes.

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	Here is an example of a minimal amd_kernel_code_t specification:			Here is an example of a minimal amd_kernel_code_t specification:

	.. code-block:: nasm			.. code-block:: nasm

	.hsa_code_object_version 1,0			.hsa_code_object_version 1,0
	.hsa_code_object_isa			.hsa_code_object_isa

	.text			.hsatext
				.globl hello_world
				.p2align 8
				.amdgpu_hsa_kernel hello_world

	hello_world:			hello_world:

	.amd_kernel_code_t			.amd_kernel_code_t
	enable_sgpr_kernarg_segment_ptr = 1			enable_sgpr_kernarg_segment_ptr = 1
	is_ptr64 = 1			is_ptr64 = 1
	compute_pgm_rsrc1_vgprs = 0			compute_pgm_rsrc1_vgprs = 0
	compute_pgm_rsrc1_sgprs = 0			compute_pgm_rsrc1_sgprs = 0
	compute_pgm_rsrc2_user_sgpr = 2			compute_pgm_rsrc2_user_sgpr = 2
	kernarg_segment_byte_size = 8			kernarg_segment_byte_size = 8
	wavefront_sgpr_count = 2			wavefront_sgpr_count = 2
	workitem_vgpr_count = 3			workitem_vgpr_count = 3
	.end_amd_kernel_code_t			.end_amd_kernel_code_t

	s_load_dwordx2 s[0:1], s[0:1] 0x0			s_load_dwordx2 s[0:1], s[0:1] 0x0
	v_mov_b32 v0, 3.14159			v_mov_b32 v0, 3.14159
	s_waitcnt lgkmcnt(0)			s_waitcnt lgkmcnt(0)
	v_mov_b32 v1, s0			v_mov_b32 v1, s0
	v_mov_b32 v2, s1			v_mov_b32 v2, s1
	flat_store_dword v0, v[1:2]			flat_store_dword v[1:2], v0
	s_endpgm			s_endpgm
				.Lfunc_end0:
				.size hello_world, .Lfunc_end0-hello_world