Don't tail-duplicate blocks that contain convergent instructions.

[jlebar]

Summary

Convergent instrs shouldn't be made control-dependent on other values,
but this is basically the whole point of tail duplication. So just bail
if we see a convergent instruction.

[iteratee]

Small comment nit, but other than that it looks good.

For your todo, I'd prefer to see that logic inside of MI.isConvergent() rather than scattered.

lib/CodeGen/TailDuplication.cpp

593 ↗

(On Diff #48136)

I think one of your TODOs is done.

[jlebar]

Move TODO into MachineInstr.h.

lib/CodeGen/TailDuplication.cpp

593 ↗

(On Diff #48136)

Yeah, thanks. I nuked this and moved the one about convergent MIs into MachineInstr::isConvergent, where it belongs.

[jlebar]

Remove comment in MachineInstr.h.

I have a different way of attacking this, see D17423.

llvm/trunk/lib/CodeGen/TailDuplication.cpp

TailDuplicatePass::shouldTailDuplicate(const MachineFunction &MF,
   // Check the instructions in the block to determine whether tail-duplication
   // is invalid or unlikely to be profitable.
   unsigned InstrCount = 0;
   for (MachineInstr &MI : TailBB) {
     // Non-duplicable things shouldn't be tail-duplicated.
     if (MI.isNotDuplicable())
       return false;
 
+    // Convergent instructions can be duplicated only if doing so doesn't add
+    // new control dependencies, which is what we're going to do here.
+    if (MI.isConvergent())
+      return false;
+
     // Do not duplicate 'return' instructions if this is a pre-regalloc run.
     // A return may expand into a lot more instructions (e.g. reload of callee
     // saved registers) after PEI.
     if (PreRegAlloc && MI.isReturn())
       return false;
 
     // Avoid duplicating calls before register allocation. Calls presents a
     // barrier to register allocation so duplicating them may end up increasing

llvm/trunk/test/CodeGen/NVPTX/TailDuplication-convergent.ll

+; RUN: llc -O2 -tail-dup-size=100 -enable-tail-merge=0 < %s | FileCheck %s
+target triple = "nvptx64-nvidia-cuda"
+
+declare void @foo()
+declare void @llvm.cuda.syncthreads()
+
+; syncthreads shouldn't be duplicated.
+; CHECK: .func call_syncthreads
+; CHECK: bar.sync
+; CHECK-NOT: bar.sync
+define void @call_syncthreads(i32* %a, i32* %b, i1 %cond, i1 %cond2) nounwind {
+  br i1 %cond, label %L1, label %L2
+  br i1 %cond2, label %Ret, label %L1
+Ret:
+  ret void
+L1:
+  store i32 0, i32* %a
+  br label %L42
+L2:
+  store i32 1, i32* %a
+  br label %L42
+L42:
+  call void @llvm.cuda.syncthreads()
+  br label %Ret
+}
+
+; Check that call_syncthreads really does trigger tail duplication.
+; CHECK: .func call_foo
+; CHECK: call
+; CHECK: call
+define void @call_foo(i32* %a, i32* %b, i1 %cond, i1 %cond2) nounwind {
+  br i1 %cond, label %L1, label %L2
+  br i1 %cond2, label %Ret, label %L1
+Ret:
+  ret void
+L1:
+  store i32 0, i32* %a
+  br label %L42
+L2:
+  store i32 1, i32* %a
+  br label %L42
+L42:
+  call void @foo()
+  br label %Ret
+}