AMDGPU: Fix mishandling alignment when scalarizing vector loads/stores

[arsenm]

Summary

I don't think this was causing any real problems, so I'm not sure
how to test for this.

[• tstellarAMD]

LGTM.

[arsenm]

r260646

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

SDValue AMDGPUTargetLowering::ScalarizeVectorLoad(const SDValue Op,
   EVT EltVT = LoadVT.getVectorElementType();
   EVT PtrVT = Load->getBasePtr().getValueType();
 
   unsigned NumElts = Load->getMemoryVT().getVectorNumElements();
   SmallVector<SDValue, 8> Loads;
   SmallVector<SDValue, 8> Chains;
 
   SDLoc SL(Op);
+  unsigned BaseAlign = Load->getAlignment();
   unsigned MemEltSize = MemEltVT.getStoreSize();
+
   MachinePointerInfo SrcValue(Load->getMemOperand()->getValue());
 
   for (unsigned i = 0; i < NumElts; ++i) {
     SDValue Ptr = DAG.getNode(ISD::ADD, SL, PtrVT, Load->getBasePtr(),
                               DAG.getConstant(i * MemEltSize, SL, PtrVT));
 
     SDValue NewLoad
       = DAG.getExtLoad(Load->getExtensionType(), SL, EltVT,
                        Load->getChain(), Ptr,
                        SrcValue.getWithOffset(i * MemEltSize),
                        MemEltVT, Load->isVolatile(), Load->isNonTemporal(),
-                       Load->isInvariant(), Load->getAlignment());
+                       Load->isInvariant(), MinAlign(BaseAlign, i * MemEltSize));
     Loads.push_back(NewLoad.getValue(0));
     Chains.push_back(NewLoad.getValue(1));
   }
 
   SDValue Ops[] = {
     DAG.getNode(ISD::BUILD_VECTOR, SL, LoadVT, Loads),
     DAG.getNode(ISD::TokenFactor, SL, MVT::Other, Chains)
   };
SDValue AMDGPUTargetLowering::ScalarizeVectorStore(SDValue Op,
   EVT MemEltVT = Store->getMemoryVT().getVectorElementType();
   EVT EltVT = Store->getValue().getValueType().getVectorElementType();
   EVT PtrVT = Store->getBasePtr().getValueType();
   unsigned NumElts = Store->getMemoryVT().getVectorNumElements();
   SDLoc SL(Op);
 
   SmallVector<SDValue, 8> Chains;
 
+  unsigned BaseAlign = Store->getAlignment();
   unsigned EltSize = MemEltVT.getStoreSize();
   MachinePointerInfo SrcValue(Store->getMemOperand()->getValue());
 
   for (unsigned i = 0, e = NumElts; i != e; ++i) {
     SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
                               Store->getValue(),
                               DAG.getConstant(i, SL, MVT::i32));
 
     SDValue Offset = DAG.getConstant(i * MemEltVT.getStoreSize(), SL, PtrVT);
     SDValue Ptr = DAG.getNode(ISD::ADD, SL, PtrVT, Store->getBasePtr(), Offset);
     SDValue NewStore =
       DAG.getTruncStore(Store->getChain(), SL, Val, Ptr,
                         SrcValue.getWithOffset(i * EltSize),
                         MemEltVT, Store->isNonTemporal(), Store->isVolatile(),
-                        Store->getAlignment());
+                        MinAlign(BaseAlign, i * EltSize));
     Chains.push_back(NewStore);
   }
 
   return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, Chains);
 }
 
 SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op,
                                                SelectionDAG &DAG) const {