Create TargetRegisterInfo hook for allowing virtual registers after Regalloc

[dschuff]

Summary

Virtual ISAs such as WebAssembly and NVPTX use infinite virtual register
sets instead of traditional phsyical registers. PrologEpilogInserter is
run after register allocation and asserts that all virtuals have been
allocated but doesn't depend on this if scavenging is not needed.

This change introduces a TRI hook for targets to allow virtual registers
after regalloc and allows PrologEpilogInserter to preserve the virtual
registers when not using scavenging.

[dschuff]

Abandoned in favor of http://reviews.llvm.org/D18366.

include/llvm/Target/TargetRegisterInfo.h

virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
     return false;
   }
 
   /// Returns true if the live-ins should be tracked after register allocation.
   virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
     return false;
   }
 
+  /// Returns true if the target uses virtual registers even after register
+  /// allocation (e.g. for virtual ISAs which use infinite virtual registers
+  /// instead of physical registers)
+  virtual bool usesVirtualRegsAfterRegAlloc() const {
+    return false;
+  }
+
   /// True if the stack can be realigned for the target.
   virtual bool canRealignStack(const MachineFunction &MF) const;
 
   /// True if storage within the function requires the stack pointer to be
   /// aligned more than the normal calling convention calls for.
   /// This cannot be overriden by the target, but canRealignStack can be
   /// overridden.
   bool needsStackRealignment(const MachineFunction &MF) const;

lib/CodeGen/PrologEpilogInserter.cpp

 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
 /// frame indexes with appropriate references.
 ///
 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
   const Function* F = Fn.getFunction();
   const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
   const TargetFrameLowering *TFI = Fn.getSubtarget().getFrameLowering();
 
-  assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
+  assert((TRI->usesVirtualRegsAfterRegAlloc() ||
+          !Fn.getRegInfo().getNumVirtRegs()) &&
+         "Regalloc must assign all vregs");
 
   RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : nullptr;
   FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
 
   // Calculate the MaxCallFrameSize and AdjustsStack variables for the
   // function's frame information. Also eliminates call frame pseudo
   // instructions.
   calculateCallsInformation(Fn);
bool PEI::runOnMachineFunction(MachineFunction &Fn) {
   // Replace all MO_FrameIndex operands with physical register references
   // and actual offsets.
   //
   replaceFrameIndices(Fn);
 
   // If register scavenging is needed, as we've enabled doing it as a
   // post-pass, scavenge the virtual registers that frame index elimination
   // inserted.
-  if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
+  if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging) {
     scavengeFrameVirtualRegs(Fn);
-
     // Clear any vregs created by virtual scavenging.
     Fn.getRegInfo().clearVirtRegs();
+  }
 
   // Warn on stack size when we exceeds the given limit.
   MachineFrameInfo *MFI = Fn.getFrameInfo();
   uint64_t StackSize = MFI->getStackSize();
   if (WarnStackSize.getNumOccurrences() > 0 && WarnStackSize < StackSize) {
     DiagnosticInfoStackSize DiagStackSize(*F, StackSize);
     F->getContext().diagnose(DiagStackSize);
   }

lib/Target/WebAssembly/WebAssemblyRegisterInfo.h

class WebAssemblyRegisterInfo final : public WebAssemblyGenRegisterInfo {
   const Triple &TT;
 
 public:
   explicit WebAssemblyRegisterInfo(const Triple &TT);
 
   // Code Generation virtual methods.
   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
   BitVector getReservedRegs(const MachineFunction &MF) const override;
+  bool usesVirtualRegsAfterRegAlloc() const override { return true; }
+
   void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
                            unsigned FIOperandNum,
                            RegScavenger *RS = nullptr) const override;
 
   // Debug information queries.
   unsigned getFrameRegister(const MachineFunction &MF) const override;
 
   const TargetRegisterClass *
   getPointerRegClass(const MachineFunction &MF,
                      unsigned Kind = 0) const override;
 };
 
 } // end namespace llvm
 
 #endif