[PPC64] Enable shrink wrapping for PPC64 LE.

[kbarton]

Summary

Re-enable shrink wrapping for PPC64 Little Endian.

One minor modification to PPCFrameLowering::findScratchRegister was necessary to handle fall-thru blocks (blocks with no terminator) correctly.

Tested with all LLVM test, clang tests, and the self-hosting build, with no problems found.

[qcolombet]

lib/Target/PowerPC/PPCFrameLowering.cpp

581

Period.

585

You still need to check that “begin” is not the terminator, otherwise, you’ll get the available register after the terminator, not before.

[kbarton]

lib/Target/PowerPC/PPCFrameLowering.cpp

585

Maybe I misunderstand, but this check should cover that.
MBBI is initialized to MBB->getFirstTerminator() above, so the iterator will not move forward if begin is the terminator.

[qcolombet]

lib/Target/PowerPC/PPCFrameLowering.cpp

585

You’re right. Looks like I need vacations :).

[hfinkel]

LGTM.

[kbarton]

Committed r254314

lib/Target/PowerPC/PPCFrameLowering.cpp

bool PPCFrameLowering::findScratchRegister(MachineBasicBlock *MBB,
   // If MBB is an entry or exit block, use R0 as the scratch register
   if ((UseAtEnd && MBB->isReturnBlock()) ||
       (!UseAtEnd && (&MBB->getParent()->front() == MBB)))
     return true;
     
   RS.initRegState();
   RS.enterBasicBlock(MBB);
 
+  if (UseAtEnd && !MBB->empty()) {
     // The scratch register will be used at the end of the block, so must consider
     // all registers used within the block
-  if (UseAtEnd && MBB->begin() != MBB->getFirstTerminator())
-    RS.forward(MBB->getFirstTerminator());
+
+    MachineBasicBlock::iterator MBBI = MBB->getFirstTerminator();
+    // If no terminator, back iterator up to previous instruction
+    if (MBBI == MBB->end())
+      MBBI = std::prev(MBBI);
+
+    if (MBBI != MBB->begin())
+      RS.forward(MBBI);
+  }
   
   if (!RS.isRegUsed(R0)) 
     return true;
 
   unsigned Reg = RS.FindUnusedReg(Subtarget.isPPC64() ? &PPC::G8RCRegClass
                                   : &PPC::GPRCRegClass);
   
   // Make sure the register scavenger was able to find an available register
if (CR2Spilled || CR3Spilled || CR4Spilled) {
     restoreCRs(Subtarget.isPPC64(), is31, CR2Spilled, CR3Spilled, CR4Spilled,
                MBB, I, CSI, CSIIndex);
   }
 
   return true;
 }
 
 bool PPCFrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
-  // FIXME: Enable this for non-Darwin PPC64 once it is confirmed working.
-  return false;
+  return (MF.getSubtarget<PPCSubtarget>().isSVR4ABI() &&
+          MF.getSubtarget<PPCSubtarget>().isPPC64());
 }

test/CodeGen/PowerPC/ppc-shrink-wrapping.ll

 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false |  FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
-; XFAIL: *
 ;
 ; Note: Lots of tests use inline asm instead of regular calls.
 ; This allows to have a better control on what the allocation will do.
 ; Otherwise, we may have spill right in the entry block, defeating
 ; shrink-wrapping. Moreover, some of the inline asm statement (nop)
 ; are here to ensure that the related paths do not end up as critical
 ; edges.