This is an archive of the discontinued LLVM Phabricator instance.

[ELF2][mips] Support both big and little endian MIPS 32-bit targets
ClosedPublic

Authored by atanasyan on Oct 14 2015, 6:16 AM.

Details

Summary
  • Make the MipsTargetInfo template class with ELFType argument. Use the argument to select an appropriate relocation type and read/write routines.
  • Add template function add32 to add-and-write relocation value in both big and little endian cases. Keep the add32le to reduce code changes.

Diff Detail

Repository
rL LLVM

Event Timeline

atanasyan updated this revision to Diff 37343.Oct 14 2015, 6:16 AM
atanasyan retitled this revision from to [ELF2][mips] Support both big and little endian MIPS 32-bit targets.
atanasyan updated this object.
atanasyan added reviewers: ruiu, rafael.
atanasyan set the repository for this revision to rL LLVM.
atanasyan added a project: lld.
atanasyan added a subscriber: llvm-commits.
ruiu accepted this revision.Oct 14 2015, 6:27 AM
ruiu edited edge metadata.

LGTM with nits.

ELF/Target.cpp
93 ↗(On Diff #37343)
template <bool IsLE> would be better for consistency.
93–101 ↗(On Diff #37343)

I'd define add32be and use add32le and add32be from add32<>.

template <> void add32<true>(uint8_t *L, int32_t V) { add32le(L, V); }
template <> void add32<false>(uint8_t *L, int32_t V) { add32be(L, V); }
585–586 ↗(On Diff #37343)

Unrelated style change.

This revision is now accepted and ready to land.Oct 14 2015, 6:27 AM
atanasyan marked 2 inline comments as done.Oct 14 2015, 6:39 AM

Thanks for your review.

ELF/Target.cpp
585–586 ↗(On Diff #37343)

Due the <ELFT> it is now impossible to keep both BaseAddr and SymVA arguments on the same line without 80-column restriction violation.

This revision was automatically updated to reflect the committed changes.