X86: Change FTAG register size in FXSAVE structure

[abhishek.aggarwal]

Summary

• Changed from 16 bits to 8 bits for Intel Architecture
  • FXSAVE structure now conforms with the layout of FXSAVE area specified by IA Architecture Software Developer Manual
• Modified Linux and FreeBSD specific files to support this change
  • MacOSX already uses 8 bits for ftag register
• Modified TestRegisters.py and a.cpp:
  • Change allows 8 bit comparison of ftag values
  • Change resolves Bug 24733: Removed XFAIL for Clang as the test works and passes for Clang compiler as well
  • Change provides a Generic/Better way of testing Bug 24457 and Bug 25050 by using 'int3' inline assembly in inferior

Signed-off-by: Abhishek Aggarwal <[e-mail]>

[emaste]

FreeBSD parts LGTM

source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_x86.cpp

RegisterContextPOSIXProcessMonitor_x86_64::ReadRegister(const RegisterInfo *reg_info, RegisterValue &value)
     // registers, m_fpr should be read at byte offsets calculated wrt to FPR structure.
 
     // Since, FPR structure is also one of the member of UserArea structure.
     // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea)
     assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr));
     uint8_t *src = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea;
     switch (reg_info->byte_size)
     {
+        case 1:
+            value.SetUInt8(*(uint8_t *)src);
+            return true;
         case 2:
             value.SetUInt16(*(uint16_t *)src);
             return true;
         case 4:
             value.SetUInt32(*(uint32_t *)src);
             return true;
         case 8:
             value.SetUInt64(*(uint64_t *)src);
if (IsFPR(reg, GetFPRType()))
             // be written in m_fpr at byte offsets calculated wrt FPR structure.
 
             // Since, FPR structure is also one of the member of UserArea structure.
             // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea)
             assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr));
             uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea;
             switch (reg_info->byte_size)
             {
+                case 1:
+                    *(uint8_t *)dst = value.GetAsUInt8();
+                    break;
                 case 2:
                     *(uint16_t *)dst = value.GetAsUInt16();
                     break;
                 case 4:
                     *(uint32_t *)dst = value.GetAsUInt32();
                     break;
                 case 8:
                     *(uint64_t *)dst = value.GetAsUInt64();

source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

NativeRegisterContextLinux_x86_64::ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value)
     // registers, m_fpr should be read at byte offsets calculated wrt to FPR structure.
 
     // Since, FPR structure is also one of the member of UserArea structure.
     // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea)
     assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr));
     uint8_t *src = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea;
     switch (reg_info->byte_size)
     {
+        case 1:
+            reg_value.SetUInt8(*(uint8_t *)src);
+            break;
         case 2:
             reg_value.SetUInt16(*(uint16_t *)src);
             break;
         case 4:
             reg_value.SetUInt32(*(uint32_t *)src);
             break;
         case 8:
             reg_value.SetUInt64(*(uint64_t *)src);
if (IsFPR(reg_index, GetFPRType()))
             // be written in m_fpr at byte offsets calculated wrt FPR structure.
 
             // Since, FPR structure is also one of the member of UserArea structure.
             // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) - byte_offset(fctrl wrt UserArea)
             assert ( (reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(m_fpr));
             uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset - m_fctrl_offset_in_userarea;
             switch (reg_info->byte_size)
             {
+                case 1:
+                    *(uint8_t *)dst = reg_value.GetAsUInt8();
+                    break;
                 case 2:
                     *(uint16_t *)dst = reg_value.GetAsUInt16();
                     break;
                 case 4:
                     *(uint32_t *)dst = reg_value.GetAsUInt32();
                     break;
                 case 8:
                     *(uint64_t *)dst = reg_value.GetAsUInt64();

source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp

struct GPR
     uint32_t esp;
     uint32_t ss;
 };
 
 struct FPR_i386
 {
     uint16_t fctrl;         // FPU Control Word (fcw)
     uint16_t fstat;         // FPU Status Word (fsw)
-    uint16_t ftag;          // FPU Tag Word (ftw)
+    uint8_t ftag;           // FPU Tag Word (ftw)
+    uint8_t reserved_1;     // Reserved
     uint16_t fop;           // Last Instruction Opcode (fop)
     union
     {
         struct
         {
             uint64_t fip;   // Instruction Pointer
             uint64_t fdp;   // Data Pointer
         } x86_64;

source/Plugins/Process/Utility/RegisterContext_x86.h

struct XMMReg
     uint8_t bytes[16];      // 128-bits for each XMM register
 };
 
 // i387_fxsave_struct
 struct FXSAVE
 {
     uint16_t fctrl;         // FPU Control Word (fcw)
     uint16_t fstat;         // FPU Status Word (fsw)
-    uint16_t ftag;          // FPU Tag Word (ftw)
+    uint8_t ftag;           // FPU Tag Word (ftw)
+    uint8_t reserved_1;     // Reserved
     uint16_t fop;           // Last Instruction Opcode (fop)
     union
     {
         struct
         {
             uint64_t fip;   // Instruction Pointer
             uint64_t fdp;   // Data Pointer
         } x86_64;

test/functionalities/register/TestRegisters.py

class RegisterCommandsTestCase(TestBase):
     def test_fp_register_write(self):
         """Test commands that write to registers, in particular floating-point registers."""
         if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
             self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
         self.build()
         self.fp_register_write()
 
     @expectedFailureAndroid(archs=["i386"]) # "register read fstat" always return 0xffff
-    @expectedFailureClang("llvm.org/pr24733")
+    @skipIfFreeBSD    #llvm.org/pr25057
     def test_fp_special_purpose_register_read(self):
         """Test commands that read fpu special purpose registers."""
         if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
             self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
         self.build()
         self.fp_special_purpose_register_read()
 
     def test_register_expressions(self):
class RegisterCommandsTestCase(TestBase):
 
     def fp_special_purpose_register_read(self):
         exe = os.path.join(os.getcwd(), "a.out")
 
         # Create a target by the debugger.
         target = self.dbg.CreateTarget(exe)
         self.assertTrue(target, VALID_TARGET)
 
-        # Find the line number to break inside a.cpp.
-        self.line = line_number('a.cpp', '// Set break point at this line.')
+        # Launch the process and stop.
+        self.expect ("run", PROCESS_STOPPED, substrs = ['stopped'])
 
-        # Set breakpoint
-        lldbutil.run_break_set_by_file_and_line (self, "a.cpp", self.line, num_expected_locations=1, loc_exact=True)
-
-        # Launch the process, and do not stop at the entry point.
-        self.runCmd ("run", RUN_SUCCEEDED)
+        # Check stop reason; Should be either signal SIGTRAP or EXC_BREAKPOINT
+        output = self.res.GetOutput()
+        matched = False
+        substrs = ['stop reason = EXC_BREAKPOINT', 'stop reason = signal SIGTRAP']
+        for str1 in substrs:
+            matched = output.find(str1) != -1
+            with recording(self, False) as sbuf:
+                print >> sbuf, "%s sub string: %s" % ('Expecting', str1)
+                print >> sbuf, "Matched" if matched else "Not Matched"
+            if matched:
+                break
+        self.assertTrue(matched, STOPPED_DUE_TO_SIGNAL)
 
         process = target.GetProcess()
         self.assertTrue(process.GetState() == lldb.eStateStopped,
                         PROCESS_STOPPED)
 
         thread = process.GetThreadAtIndex(0)
         self.assertTrue(thread.IsValid(), "current thread is valid")
 
def fp_special_purpose_register_read(self):
             else :
                 self.expect("register read fstat",
                     substrs = ['fstat' + ' = ', str("0x%0.4x" % (reg_value_fstat_initial - 0x0800))])
                 reg_value_fstat_initial = (reg_value_fstat_initial - 0x0800)
                 fstat_top_pointer_initial -= 1
 
             # Verify ftag and save it to be used for verification in next execution of 'si' command
             self.expect("register read ftag",
-                substrs = ['ftag' + ' = ', str("0x%0.4x" % (reg_value_ftag_initial | (1<< fstat_top_pointer_initial)))])
+                substrs = ['ftag' + ' = ', str("0x%0.2x" % (reg_value_ftag_initial | (1<< fstat_top_pointer_initial)))])
             reg_value_ftag_initial = reg_value_ftag_initial | (1<< fstat_top_pointer_initial)
 
     def fp_register_write(self):
         exe = os.path.join(os.getcwd(), "a.out")
 
         # Create a target by the debugger.
         target = self.dbg.CreateTarget(exe)
         self.assertTrue(target, VALID_TARGET)

test/functionalities/register/a.cpp

 //===-- a.cpp ------------------------------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 #include <stdio.h>
 
 long double
 return_long_double (long double value)
 {
     float a=2, b=4,c=8, d=16, e=32, f=64, k=128, l=256, add=0;
     __asm__ (
+        "int3 ;"
         "flds %1 ;"
         "flds %2 ;"
         "flds %3 ;"
         "flds %4 ;"
         "flds %5 ;"
         "flds %6 ;"
         "flds %7 ;"
         "faddp ;" : "=g" (add) : "g" (a), "g" (b), "g" (c), "g" (d), "g" (e), "g" (f), "g" (k), "g" (l) );  // Set break point at this line.