AMDGPU: Refactor isVGPRToSGPRCopy

[arsenm]

Summary

It should now correctly handle physical registers and make
it easier to identify the other direction.

[• tstellarAMD]

LGTM.

[arsenm]

r250132

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

 #define DEBUG_TYPE "sgpr-copies"
 
 namespace {
 
 class SIFixSGPRCopies : public MachineFunctionPass {
 
 private:
   static char ID;
-  bool isVGPRToSGPRCopy(const MachineInstr &Copy, const SIRegisterInfo *TRI,
-                        const MachineRegisterInfo &MRI) const;
+  std::pair<const TargetRegisterClass *, const TargetRegisterClass *>
+  getCopyRegClasses(const MachineInstr &Copy,
+                    const SIRegisterInfo &TRI,
 
+  bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC,
+                        const TargetRegisterClass *DstRC,
+                        const SIRegisterInfo &TRI) const;
+
+  bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC,
+                        const TargetRegisterClass *DstRC,
+                        const SIRegisterInfo &TRI) const;
+
 public:
   SIFixSGPRCopies(TargetMachine &tm) : MachineFunctionPass(ID) { }
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 
   const char *getPassName() const override {
     return "SI Fix SGPR copies";
   }
if (!MI.getOperand(i).isReg() ||
       continue;
 
     if (TRI->hasVGPRs(MRI.getRegClass(MI.getOperand(i).getReg())))
       return true;
   }
   return false;
 }
 
-bool SIFixSGPRCopies::isVGPRToSGPRCopy(const MachineInstr &Copy,
-                                      const SIRegisterInfo *TRI,
-                                      const MachineRegisterInfo &MRI) const {
-
+std::pair<const TargetRegisterClass *, const TargetRegisterClass *>
+SIFixSGPRCopies::getCopyRegClasses(const MachineInstr &Copy,
+                                   const SIRegisterInfo &TRI,
   unsigned DstReg = Copy.getOperand(0).getReg();
   unsigned SrcReg = Copy.getOperand(1).getReg();
-  unsigned SrcSubReg = Copy.getOperand(1).getSubReg();
 
-  if (!TargetRegisterInfo::isVirtualRegister(DstReg)) {
-    // If the destination register is a physical register there isn't really
-    // much we can do to fix this.
-    return false;
-  }
+  const TargetRegisterClass *SrcRC =
+    TargetRegisterInfo::isVirtualRegister(SrcReg) ?
+    MRI.getRegClass(SrcReg) :
+    TRI.getPhysRegClass(SrcReg);
+
+  // We don't really care about the subregister here.
+  // SrcRC = TRI.getSubRegClass(SrcRC, Copy.getOperand(1).getSubReg());
+
+  const TargetRegisterClass *DstRC =
+    TargetRegisterInfo::isVirtualRegister(DstReg) ?
+    MRI.getRegClass(DstReg) :
+    TRI.getPhysRegClass(DstReg);
+
+  return std::make_pair(SrcRC, DstRC);
 
-  if (!TargetRegisterInfo::isVirtualRegister(SrcReg))
-    return false;
+bool SIFixSGPRCopies::isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC,
+                                       const TargetRegisterClass *DstRC,
+                                       const SIRegisterInfo &TRI) const {
+  return TRI.isSGPRClass(DstRC) && TRI.hasVGPRs(SrcRC);
+}
 
-  const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);
-  const TargetRegisterClass *SrcRC
-    = TRI->getSubRegClass(MRI.getRegClass(SrcReg), SrcSubReg);
-  return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC);
+bool SIFixSGPRCopies::isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC,
+                                       const TargetRegisterClass *DstRC,
+                                       const SIRegisterInfo &TRI) const {
+  return TRI.isSGPRClass(SrcRC) && TRI.hasVGPRs(DstRC);
 }
 
 bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
   MachineRegisterInfo &MRI = MF.getRegInfo();
   const SIRegisterInfo *TRI =
       static_cast<const SIRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
   const SIInstrInfo *TII =
       static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo());
   for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
                                                   BI != BE; ++BI) {
 
     MachineBasicBlock &MBB = *BI;
     for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
                                                       I != E; ++I) {
       MachineInstr &MI = *I;
 
       switch (MI.getOpcode()) {
       default:
         continue;
       case AMDGPU::COPY: {
-        if (isVGPRToSGPRCopy(MI, TRI, MRI)) {
+        // If the destination register is a physical register there isn't really
+        // much we can do to fix this.
+        if (!TargetRegisterInfo::isVirtualRegister(MI.getOperand(0).getReg()))
+          continue;
+
+        const TargetRegisterClass *SrcRC, *DstRC;
+        std::tie(SrcRC, DstRC) = getCopyRegClasses(MI, *TRI, MRI);
+        if (isVGPRToSGPRCopy(SrcRC, DstRC, *TRI)) {
           DEBUG(dbgs() << "Fixing VGPR -> SGPR copy: " << MI);
           TII->moveToVALU(MI);
         }
 
         break;
       }
       case AMDGPU::PHI: {
         DEBUG(dbgs() << "Fixing PHI: " << MI);