AMDGPU: Remove literal constants from VOP2b src0

[arsenm]

Summary

Because of the constant bus requirement, it is never legal to
use a literal constant for these instructions despite the encoding
allowing it.

[• tstellarAMD]

lib/Target/AMDGPU/SIInstrInfo.td

1195

We already set Src0RC32 to the correct class here.

[arsenm]

lib/Target/AMDGPU/SIInstrInfo.td

1195

I didn't notice this. This seems to have been an accident before. I'll just add the comment to this

[arsenm]

Just add comment

[• tstellarAMD]

LGTM.

[arsenm]

r249500

lib/Target/AMDGPU/SIInstrInfo.td

def VOP2b_I32_I1_I32_I32 : VOPProfile<[i32, i32, i32, untyped]> {
   let Asm64 = "$dst, $sdst, $src0, $src1";
   let Outs32 = (outs DstRC:$dst);
   let Outs64 = (outs DstRC:$dst, SReg_64:$sdst);
 }
 
 // Write out to vcc or arbitrary SGPR and read in from vcc or
 // arbitrary SGPR.
 def VOP2b_I32_I1_I32_I32_I1 : VOPProfile<[i32, i32, i32, i1]> {
+  // We use VCSrc_32 to exclude literal constants, even though the
+  // encoding normally allows them since the implicit VCC use means
+  // using one would always violate the constant bus
+  // restriction. SGPRs are still allowed because it should
+  // technically be possible to use VCC again as src0.
   let Src0RC32 = VCSrc_32;
   let Asm32 = "$dst, vcc, $src0, $src1, vcc";
   let Asm64 = "$dst, $sdst, $src0, $src1, $src2";
   let Outs32 = (outs DstRC:$dst);
   let Outs64 = (outs DstRC:$dst, SReg_64:$sdst);
 
   // Suppress src2 implied by type since the 32-bit encoding uses an
   // implicit VCC use.
   let Ins32 = (ins Src0RC32:$src0, Src1RC32:$src1);