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[mips][FastISel] Fix generated code for IR's select instruction.
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Authored by vkalintiris on Jul 25 2015, 6:03 PM.

Details

Summary

Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Diff Detail

Event Timeline

vkalintiris retitled this revision from to [mips][FastISel] Fix generated code for IR's select instruction..
vkalintiris updated this object.
vkalintiris added a reviewer: dsanders.
vkalintiris added a subscriber: llvm-commits.
dsanders accepted this revision.Jul 27 2015, 6:16 AM
dsanders edited edge metadata.

LGTM

This revision is now accepted and ready to land.Jul 27 2015, 6:16 AM
This revision was automatically updated to reflect the committed changes.