[AMDGPU] Disable unused gfx10 dpp instructions

rampitec · rampitec · commit 8f002193bf49 · 2019-10-08T16:56:01.000Z
Inhibit generation of unused real dpp instructions on gfx10 just like it is done on other subtargets. This does not change anything because these are illegal anyway and not accepted, but it does reduce the number of instruction definitions generated. Differential Revision: https://reviews.llvm.org/D68607 llvm-svn: 374083
diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -506,11 +506,13 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {
     }
   }
   multiclass VOP1_Real_dpp_gfx10<bits<9> op> {
+    foreach _ = BoolToList<!cast<VOP1_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp_gfx10 : VOP1_DPP16<op{7-0}, !cast<VOP1_Pseudo>(NAME#"_e32")> {
       let DecoderNamespace = "SDWA10";
     }
   }
   multiclass VOP1_Real_dpp8_gfx10<bits<9> op> {
+    foreach _ = BoolToList<!cast<VOP1_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp8_gfx10 : VOP1_DPP8<op{7-0}, !cast<VOP1_Pseudo>(NAME#"_e32")> {
       let DecoderNamespace = "DPP8";
     }
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -939,11 +939,13 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {
     }
   }
   multiclass VOP2_Real_dpp_gfx10<bits<6> op> {
+    foreach _ = BoolToList<!cast<VOP2_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp_gfx10 : VOP2_DPP16<op, !cast<VOP2_Pseudo>(NAME#"_e32")> {
       let DecoderNamespace = "SDWA10";
     }
   }
   multiclass VOP2_Real_dpp8_gfx10<bits<6> op> {
+    foreach _ = BoolToList<!cast<VOP2_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp8_gfx10 : VOP2_DPP8<op, !cast<VOP2_Pseudo>(NAME#"_e32")> {
       let DecoderNamespace = "DPP8";
     }
@@ -981,13 +983,15 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {
     }
     multiclass VOP2_Real_dpp_gfx10_with_name<bits<6> op, string opName,
                                              string asmName> {
+      foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in
       def _dpp_gfx10 : VOP2_DPP16<op, !cast<VOP2_Pseudo>(opName#"_e32")> {
         VOP2_Pseudo ps = !cast<VOP2_Pseudo>(opName#"_e32");
         let AsmString = asmName # ps.Pfl.AsmDPP16;
       }
     }
     multiclass VOP2_Real_dpp8_gfx10_with_name<bits<6> op, string opName,
                                               string asmName> {
+      foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in
       def _dpp8_gfx10 : VOP2_DPP8<op, !cast<VOP2_Pseudo>(opName#"_e32")> {
         VOP2_Pseudo ps = !cast<VOP2_Pseudo>(opName#"_e32");
         let AsmString = asmName # ps.Pfl.AsmDPP8;
@@ -1018,12 +1022,14 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {
         let AsmString = asmName # !subst(", vcc", "", Ps.AsmOperands);
         let DecoderNamespace = "SDWA10";
       }
+    foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp_gfx10 :
       VOP2_DPP16<op, !cast<VOP2_Pseudo>(opName#"_e32"), asmName> {
         string AsmDPP = !cast<VOP2_Pseudo>(opName#"_e32").Pfl.AsmDPP16;
         let AsmString = asmName # !subst(", vcc", "", AsmDPP);
         let DecoderNamespace = "SDWA10";
       }
+    foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in
     def _dpp8_gfx10 :
       VOP2_DPP8<op, !cast<VOP2_Pseudo>(opName#"_e32"), asmName> {
         string AsmDPP8 = !cast<VOP2_Pseudo>(opName#"_e32").Pfl.AsmDPP8;

Original file line number	Diff line number	Diff line change
`@@ -506,11 +506,13 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {`
`506`	`506`	`}`
`507`	`507`	`}`
`508`	`508`	`multiclass VOP1_Real_dpp_gfx10<bits<9> op> {`
	`509`	`+ foreach _ = BoolToList<!cast<VOP1_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in`
`509`	`510`	`def _dpp_gfx10 : VOP1_DPP16<op{7-0}, !cast<VOP1_Pseudo>(NAME#"_e32")> {`
`510`	`511`	`let DecoderNamespace = "SDWA10";`
`511`	`512`	`}`
`512`	`513`	`}`
`513`	`514`	`multiclass VOP1_Real_dpp8_gfx10<bits<9> op> {`
	`515`	`+ foreach _ = BoolToList<!cast<VOP1_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in`
`514`	`516`	`def _dpp8_gfx10 : VOP1_DPP8<op{7-0}, !cast<VOP1_Pseudo>(NAME#"_e32")> {`
`515`	`517`	`let DecoderNamespace = "DPP8";`
`516`	`518`	`}`
Original file line number	Diff line number	Diff line change
`@@ -939,11 +939,13 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {`
`939`	`939`	`}`
`940`	`940`	`}`
`941`	`941`	`multiclass VOP2_Real_dpp_gfx10<bits<6> op> {`
	`942`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in`
`942`	`943`	`def _dpp_gfx10 : VOP2_DPP16<op, !cast<VOP2_Pseudo>(NAME#"_e32")> {`
`943`	`944`	`let DecoderNamespace = "SDWA10";`
`944`	`945`	`}`
`945`	`946`	`}`
`946`	`947`	`multiclass VOP2_Real_dpp8_gfx10<bits<6> op> {`
	`948`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(NAME#"_e32").Pfl.HasExtDPP>.ret in`
`947`	`949`	`def _dpp8_gfx10 : VOP2_DPP8<op, !cast<VOP2_Pseudo>(NAME#"_e32")> {`
`948`	`950`	`let DecoderNamespace = "DPP8";`
`949`	`951`	`}`
`@@ -981,13 +983,15 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {`
`981`	`983`	`}`
`982`	`984`	`multiclass VOP2_Real_dpp_gfx10_with_name<bits<6> op, string opName,`
`983`	`985`	`string asmName> {`
	`986`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in`
`984`	`987`	`def _dpp_gfx10 : VOP2_DPP16<op, !cast<VOP2_Pseudo>(opName#"_e32")> {`
`985`	`988`	`VOP2_Pseudo ps = !cast<VOP2_Pseudo>(opName#"_e32");`
`986`	`989`	`let AsmString = asmName # ps.Pfl.AsmDPP16;`
`987`	`990`	`}`
`988`	`991`	`}`
`989`	`992`	`multiclass VOP2_Real_dpp8_gfx10_with_name<bits<6> op, string opName,`
`990`	`993`	`string asmName> {`
	`994`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in`
`991`	`995`	`def _dpp8_gfx10 : VOP2_DPP8<op, !cast<VOP2_Pseudo>(opName#"_e32")> {`
`992`	`996`	`VOP2_Pseudo ps = !cast<VOP2_Pseudo>(opName#"_e32");`
`993`	`997`	`let AsmString = asmName # ps.Pfl.AsmDPP8;`
`@@ -1018,12 +1022,14 @@ let AssemblerPredicate = isGFX10Plus, DecoderNamespace = "GFX10" in {`
`1018`	`1022`	`let AsmString = asmName # !subst(", vcc", "", Ps.AsmOperands);`
`1019`	`1023`	`let DecoderNamespace = "SDWA10";`
`1020`	`1024`	`}`
	`1025`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in`
`1021`	`1026`	`def _dpp_gfx10 :`
`1022`	`1027`	`VOP2_DPP16<op, !cast<VOP2_Pseudo>(opName#"_e32"), asmName> {`
`1023`	`1028`	`string AsmDPP = !cast<VOP2_Pseudo>(opName#"_e32").Pfl.AsmDPP16;`
`1024`	`1029`	`let AsmString = asmName # !subst(", vcc", "", AsmDPP);`
`1025`	`1030`	`let DecoderNamespace = "SDWA10";`
`1026`	`1031`	`}`
	`1032`	`+ foreach _ = BoolToList<!cast<VOP2_Pseudo>(opName#"_e32").Pfl.HasExtDPP>.ret in`
`1027`	`1033`	`def _dpp8_gfx10 :`
`1028`	`1034`	`VOP2_DPP8<op, !cast<VOP2_Pseudo>(opName#"_e32"), asmName> {`
`1029`	`1035`	`string AsmDPP8 = !cast<VOP2_Pseudo>(opName#"_e32").Pfl.AsmDPP8;`