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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -instcombine %s -S -o - | FileCheck %s |
| 3 | + |
| 4 | +; Clamp positive to allOnes: |
| 5 | +; E.g., clamp255 implemented in a shifty way, could be optimized as v > 255 ? 255 : v, where sub hasNoSignedWrap. |
| 6 | +; int32 clamp255(int32 v) { |
| 7 | +; return (((255 - (v)) >> 31) | (v)) & 255; |
| 8 | +; } |
| 9 | +; |
| 10 | + |
| 11 | +; Scalar Types |
| 12 | + |
| 13 | +define i32 @clamp255_i32(i32 %x) { |
| 14 | +; CHECK-LABEL: @clamp255_i32( |
| 15 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 255, [[X:%.*]] |
| 16 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 17 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 18 | +; CHECK-NEXT: [[AND:%.*]] = and i32 [[OR]], 255 |
| 19 | +; CHECK-NEXT: ret i32 [[AND]] |
| 20 | +; |
| 21 | + %sub = sub nsw i32 255, %x |
| 22 | + %shr = ashr i32 %sub, 31 |
| 23 | + %or = or i32 %shr, %x |
| 24 | + %and = and i32 %or, 255 |
| 25 | + ret i32 %and |
| 26 | +} |
| 27 | + |
| 28 | +define i8 @sub_ashr_or_i8(i8 %x, i8 %y) { |
| 29 | +; CHECK-LABEL: @sub_ashr_or_i8( |
| 30 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[Y:%.*]], [[X:%.*]] |
| 31 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i8 [[SUB]], 7 |
| 32 | +; CHECK-NEXT: [[OR:%.*]] = or i8 [[SHR]], [[X]] |
| 33 | +; CHECK-NEXT: ret i8 [[OR]] |
| 34 | +; |
| 35 | + %sub = sub nsw i8 %y, %x |
| 36 | + %shr = ashr i8 %sub, 7 |
| 37 | + %or = or i8 %shr, %x |
| 38 | + ret i8 %or |
| 39 | +} |
| 40 | + |
| 41 | +define i16 @sub_ashr_or_i16(i16 %x, i16 %y) { |
| 42 | +; CHECK-LABEL: @sub_ashr_or_i16( |
| 43 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i16 [[Y:%.*]], [[X:%.*]] |
| 44 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i16 [[SUB]], 15 |
| 45 | +; CHECK-NEXT: [[OR:%.*]] = or i16 [[SHR]], [[X]] |
| 46 | +; CHECK-NEXT: ret i16 [[OR]] |
| 47 | +; |
| 48 | + %sub = sub nsw i16 %y, %x |
| 49 | + %shr = ashr i16 %sub, 15 |
| 50 | + %or = or i16 %shr, %x |
| 51 | + ret i16 %or |
| 52 | +} |
| 53 | + |
| 54 | +define i32 @sub_ashr_or_i32(i32 %x, i32 %y) { |
| 55 | +; CHECK-LABEL: @sub_ashr_or_i32( |
| 56 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 57 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 58 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 59 | +; CHECK-NEXT: ret i32 [[OR]] |
| 60 | +; |
| 61 | + %sub = sub nsw i32 %y, %x |
| 62 | + %shr = ashr i32 %sub, 31 |
| 63 | + %or = or i32 %shr, %x |
| 64 | + ret i32 %or |
| 65 | +} |
| 66 | + |
| 67 | +define i64 @sub_ashr_or_i64(i64 %x, i64 %y) { |
| 68 | +; CHECK-LABEL: @sub_ashr_or_i64( |
| 69 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[Y:%.*]], [[X:%.*]] |
| 70 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i64 [[SUB]], 63 |
| 71 | +; CHECK-NEXT: [[OR:%.*]] = or i64 [[SHR]], [[X]] |
| 72 | +; CHECK-NEXT: ret i64 [[OR]] |
| 73 | +; |
| 74 | + %sub = sub nsw i64 %y, %x |
| 75 | + %shr = ashr i64 %sub, 63 |
| 76 | + %or = or i64 %shr, %x |
| 77 | + ret i64 %or |
| 78 | +} |
| 79 | + |
| 80 | +; nuw nsw |
| 81 | + |
| 82 | +define i32 @sub_ashr_or_i32_nuw_nsw(i32 %x, i32 %y) { |
| 83 | +; CHECK-LABEL: @sub_ashr_or_i32_nuw_nsw( |
| 84 | +; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[Y:%.*]], [[X:%.*]] |
| 85 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 86 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 87 | +; CHECK-NEXT: ret i32 [[OR]] |
| 88 | +; |
| 89 | + %sub = sub nuw nsw i32 %y, %x |
| 90 | + %shr = ashr i32 %sub, 31 |
| 91 | + %or = or i32 %shr, %x |
| 92 | + ret i32 %or |
| 93 | +} |
| 94 | + |
| 95 | +; Commute |
| 96 | + |
| 97 | +define i32 @sub_ashr_or_i32_commute(i32 %x, i32 %y) { |
| 98 | +; CHECK-LABEL: @sub_ashr_or_i32_commute( |
| 99 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 100 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 101 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 102 | +; CHECK-NEXT: ret i32 [[OR]] |
| 103 | +; |
| 104 | + %sub = sub nsw i32 %y, %x |
| 105 | + %shr = ashr i32 %sub, 31 |
| 106 | + %or = or i32 %x, %shr ; commute %shr and %x |
| 107 | + ret i32 %or |
| 108 | +} |
| 109 | + |
| 110 | +; Vector Types |
| 111 | + |
| 112 | +define <4 x i32> @sub_ashr_or_i32_vec(<4 x i32> %x, <4 x i32> %y) { |
| 113 | +; CHECK-LABEL: @sub_ashr_or_i32_vec( |
| 114 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> [[Y:%.*]], [[X:%.*]] |
| 115 | +; CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i32> [[SUB]], <i32 31, i32 31, i32 31, i32 31> |
| 116 | +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[SHR]], [[X]] |
| 117 | +; CHECK-NEXT: ret <4 x i32> [[OR]] |
| 118 | +; |
| 119 | + %sub = sub nsw <4 x i32> %y, %x |
| 120 | + %shr = ashr <4 x i32> %sub, <i32 31, i32 31, i32 31, i32 31> |
| 121 | + %or = or <4 x i32> %shr, %x |
| 122 | + ret <4 x i32> %or |
| 123 | +} |
| 124 | + |
| 125 | +define <4 x i32> @sub_ashr_or_i32_vec_nuw_nsw(<4 x i32> %x, <4 x i32> %y) { |
| 126 | +; CHECK-LABEL: @sub_ashr_or_i32_vec_nuw_nsw( |
| 127 | +; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw <4 x i32> [[Y:%.*]], [[X:%.*]] |
| 128 | +; CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i32> [[SUB]], <i32 31, i32 31, i32 31, i32 31> |
| 129 | +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[SHR]], [[X]] |
| 130 | +; CHECK-NEXT: ret <4 x i32> [[OR]] |
| 131 | +; |
| 132 | + %sub = sub nuw nsw <4 x i32> %y, %x |
| 133 | + %shr = ashr <4 x i32> %sub, <i32 31, i32 31, i32 31, i32 31> |
| 134 | + %or = or <4 x i32> %shr, %x |
| 135 | + ret <4 x i32> %or |
| 136 | +} |
| 137 | + |
| 138 | +define <4 x i32> @sub_ashr_or_i32_vec_commute(<4 x i32> %x, <4 x i32> %y) { |
| 139 | +; CHECK-LABEL: @sub_ashr_or_i32_vec_commute( |
| 140 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> [[Y:%.*]], [[X:%.*]] |
| 141 | +; CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i32> [[SUB]], <i32 31, i32 31, i32 31, i32 31> |
| 142 | +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[SHR]], [[X]] |
| 143 | +; CHECK-NEXT: ret <4 x i32> [[OR]] |
| 144 | +; |
| 145 | + %sub = sub nsw <4 x i32> %y, %x |
| 146 | + %shr = ashr <4 x i32> %sub, <i32 31, i32 31, i32 31, i32 31> |
| 147 | + %or = or <4 x i32> %x, %shr |
| 148 | + ret <4 x i32> %or |
| 149 | +} |
| 150 | + |
| 151 | +; Extra uses |
| 152 | + |
| 153 | +define i32 @sub_ashr_or_i32_extra_use_sub(i32 %x, i32 %y, i32* %p) { |
| 154 | +; CHECK-LABEL: @sub_ashr_or_i32_extra_use_sub( |
| 155 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 156 | +; CHECK-NEXT: store i32 [[SUB]], i32* [[P:%.*]], align 4 |
| 157 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 158 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 159 | +; CHECK-NEXT: ret i32 [[OR]] |
| 160 | +; |
| 161 | + %sub = sub nsw i32 %y, %x |
| 162 | + store i32 %sub, i32* %p |
| 163 | + %shr = ashr i32 %sub, 31 |
| 164 | + %or = or i32 %shr, %x |
| 165 | + ret i32 %or |
| 166 | +} |
| 167 | + |
| 168 | +define i32 @sub_ashr_or_i32_extra_use_or(i32 %x, i32 %y, i32* %p) { |
| 169 | +; CHECK-LABEL: @sub_ashr_or_i32_extra_use_or( |
| 170 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 171 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 172 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 173 | +; CHECK-NEXT: store i32 [[OR]], i32* [[P:%.*]], align 4 |
| 174 | +; CHECK-NEXT: ret i32 [[OR]] |
| 175 | +; |
| 176 | + %sub = sub nsw i32 %y, %x |
| 177 | + %shr = ashr i32 %sub, 31 |
| 178 | + %or = or i32 %shr, %x |
| 179 | + store i32 %or, i32* %p |
| 180 | + ret i32 %or |
| 181 | +} |
| 182 | + |
| 183 | +; Negative Tests |
| 184 | + |
| 185 | +define i32 @sub_ashr_or_i32_extra_use_ashr(i32 %x, i32 %y, i32* %p) { |
| 186 | +; CHECK-LABEL: @sub_ashr_or_i32_extra_use_ashr( |
| 187 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 188 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 189 | +; CHECK-NEXT: store i32 [[SHR]], i32* [[P:%.*]], align 4 |
| 190 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 191 | +; CHECK-NEXT: ret i32 [[OR]] |
| 192 | +; |
| 193 | + %sub = sub nsw i32 %y, %x |
| 194 | + %shr = ashr i32 %sub, 31 |
| 195 | + store i32 %shr, i32* %p |
| 196 | + %or = or i32 %shr, %x |
| 197 | + ret i32 %or |
| 198 | +} |
| 199 | + |
| 200 | +define i32 @sub_ashr_or_i32_no_nsw_nuw(i32 %x, i32 %y) { |
| 201 | +; CHECK-LABEL: @sub_ashr_or_i32_no_nsw_nuw( |
| 202 | +; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y:%.*]], [[X:%.*]] |
| 203 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 31 |
| 204 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 205 | +; CHECK-NEXT: ret i32 [[OR]] |
| 206 | +; |
| 207 | + %sub = sub i32 %y, %x |
| 208 | + %shr = ashr i32 %sub, 31 |
| 209 | + %or = or i32 %shr, %x |
| 210 | + ret i32 %or |
| 211 | +} |
| 212 | + |
| 213 | +define <4 x i32> @sub_ashr_or_i32_vec_undef1(<4 x i32> %x) { |
| 214 | +; CHECK-LABEL: @sub_ashr_or_i32_vec_undef1( |
| 215 | +; CHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> <i32 255, i32 255, i32 undef, i32 255>, [[X:%.*]] |
| 216 | +; CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i32> [[SUB]], <i32 31, i32 31, i32 31, i32 31> |
| 217 | +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[SHR]], [[X]] |
| 218 | +; CHECK-NEXT: ret <4 x i32> [[OR]] |
| 219 | +; |
| 220 | + %sub = sub <4 x i32> <i32 255, i32 255, i32 undef, i32 255>, %x |
| 221 | + %shr = ashr <4 x i32> %sub, <i32 31, i32 31, i32 31, i32 31> |
| 222 | + %or = or <4 x i32> %shr, %x |
| 223 | + ret <4 x i32> %or |
| 224 | +} |
| 225 | + |
| 226 | +define <4 x i32> @sub_ashr_or_i32_vec_undef2(<4 x i32> %x) { |
| 227 | +; CHECK-LABEL: @sub_ashr_or_i32_vec_undef2( |
| 228 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> <i32 255, i32 255, i32 255, i32 255>, [[X:%.*]] |
| 229 | +; CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i32> [[SUB]], <i32 undef, i32 31, i32 31, i32 31> |
| 230 | +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[SHR]], [[X]] |
| 231 | +; CHECK-NEXT: ret <4 x i32> [[OR]] |
| 232 | +; |
| 233 | + %sub = sub nsw <4 x i32> <i32 255, i32 255, i32 255, i32 255>, %x |
| 234 | + %shr = ashr <4 x i32> %sub, <i32 undef, i32 31, i32 31, i32 31> |
| 235 | + %or = or <4 x i32> %shr, %x |
| 236 | + ret <4 x i32> %or |
| 237 | +} |
| 238 | + |
| 239 | +define i32 @sub_ashr_or_i32_shift_wrong_bit(i32 %x, i32 %y) { |
| 240 | +; CHECK-LABEL: @sub_ashr_or_i32_shift_wrong_bit( |
| 241 | +; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[Y:%.*]], [[X:%.*]] |
| 242 | +; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[SUB]], 11 |
| 243 | +; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHR]], [[X]] |
| 244 | +; CHECK-NEXT: ret i32 [[OR]] |
| 245 | +; |
| 246 | + %sub = sub nsw i32 %y, %x |
| 247 | + %shr = ashr i32 %sub, 11 |
| 248 | + %or = or i32 %shr, %x |
| 249 | + ret i32 %or |
| 250 | +} |
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