Skip to content

Commit 9f4c757

Browse files
committedSep 19, 2019
AMDGPU/SILoadStoreOptimizer: Add const to more functions
Reviewers: arsenm, pendingchaos, rampitec, nhaehnle, vpykhtin Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65901 llvm-svn: 372298
1 parent bffbeec commit 9f4c757

File tree

1 file changed

+12
-12
lines changed

1 file changed

+12
-12
lines changed
 

‎llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

+12-12
Original file line numberDiff line numberDiff line change
@@ -183,17 +183,17 @@ class SILoadStoreOptimizer : public MachineFunctionPass {
183183
MachineBasicBlock::iterator mergeBufferStorePair(CombineInfo &CI);
184184

185185
void updateBaseAndOffset(MachineInstr &I, unsigned NewBase,
186-
int32_t NewOffset);
187-
unsigned computeBase(MachineInstr &MI, const MemAddress &Addr);
188-
MachineOperand createRegOrImm(int32_t Val, MachineInstr &MI);
189-
Optional<int32_t> extractConstOffset(const MachineOperand &Op);
190-
void processBaseWithConstOffset(const MachineOperand &Base, MemAddress &Addr);
186+
int32_t NewOffset) const;
187+
unsigned computeBase(MachineInstr &MI, const MemAddress &Addr) const;
188+
MachineOperand createRegOrImm(int32_t Val, MachineInstr &MI) const;
189+
Optional<int32_t> extractConstOffset(const MachineOperand &Op) const;
190+
void processBaseWithConstOffset(const MachineOperand &Base, MemAddress &Addr) const;
191191
/// Promotes constant offset to the immediate by adjusting the base. It
192192
/// tries to use a base from the nearby instructions that allows it to have
193193
/// a 13bit constant offset which gets promoted to the immediate.
194194
bool promoteConstantOffsetToImm(MachineInstr &CI,
195195
MemInfoMap &Visited,
196-
SmallPtrSet<MachineInstr *, 4> &Promoted);
196+
SmallPtrSet<MachineInstr *, 4> &Promoted) const;
197197

198198
public:
199199
static char ID;
@@ -1151,7 +1151,7 @@ SILoadStoreOptimizer::mergeBufferStorePair(CombineInfo &CI) {
11511151
}
11521152

11531153
MachineOperand
1154-
SILoadStoreOptimizer::createRegOrImm(int32_t Val, MachineInstr &MI) {
1154+
SILoadStoreOptimizer::createRegOrImm(int32_t Val, MachineInstr &MI) const {
11551155
APInt V(32, Val, true);
11561156
if (TII->isInlineConstant(V))
11571157
return MachineOperand::CreateImm(Val);
@@ -1168,7 +1168,7 @@ SILoadStoreOptimizer::createRegOrImm(int32_t Val, MachineInstr &MI) {
11681168

11691169
// Compute base address using Addr and return the final register.
11701170
unsigned SILoadStoreOptimizer::computeBase(MachineInstr &MI,
1171-
const MemAddress &Addr) {
1171+
const MemAddress &Addr) const {
11721172
MachineBasicBlock *MBB = MI.getParent();
11731173
MachineBasicBlock::iterator MBBI = MI.getIterator();
11741174
DebugLoc DL = MI.getDebugLoc();
@@ -1227,13 +1227,13 @@ unsigned SILoadStoreOptimizer::computeBase(MachineInstr &MI,
12271227
// Update base and offset with the NewBase and NewOffset in MI.
12281228
void SILoadStoreOptimizer::updateBaseAndOffset(MachineInstr &MI,
12291229
unsigned NewBase,
1230-
int32_t NewOffset) {
1230+
int32_t NewOffset) const {
12311231
TII->getNamedOperand(MI, AMDGPU::OpName::vaddr)->setReg(NewBase);
12321232
TII->getNamedOperand(MI, AMDGPU::OpName::offset)->setImm(NewOffset);
12331233
}
12341234

12351235
Optional<int32_t>
1236-
SILoadStoreOptimizer::extractConstOffset(const MachineOperand &Op) {
1236+
SILoadStoreOptimizer::extractConstOffset(const MachineOperand &Op) const {
12371237
if (Op.isImm())
12381238
return Op.getImm();
12391239

@@ -1259,7 +1259,7 @@ SILoadStoreOptimizer::extractConstOffset(const MachineOperand &Op) {
12591259
// %Base:vreg_64 =
12601260
// REG_SEQUENCE %LO:vgpr_32, %subreg.sub0, %HI:vgpr_32, %subreg.sub1
12611261
void SILoadStoreOptimizer::processBaseWithConstOffset(const MachineOperand &Base,
1262-
MemAddress &Addr) {
1262+
MemAddress &Addr) const {
12631263
if (!Base.isReg())
12641264
return;
12651265

@@ -1314,7 +1314,7 @@ void SILoadStoreOptimizer::processBaseWithConstOffset(const MachineOperand &Base
13141314
bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
13151315
MachineInstr &MI,
13161316
MemInfoMap &Visited,
1317-
SmallPtrSet<MachineInstr *, 4> &AnchorList) {
1317+
SmallPtrSet<MachineInstr *, 4> &AnchorList) const {
13181318

13191319
if (!(MI.mayLoad() ^ MI.mayStore()))
13201320
return false;

0 commit comments

Comments
 (0)
Please sign in to comment.