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committedMay 24, 2019
[WebAssembly] Expand more SIMD float ops
Summary: These were previously causing ISel failures. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62354 llvm-svn: 361577
·
llvmorg-21-initllvmorg-9.0.0-rc1
1 parent 8869a98 commit 55229f6

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3 files changed

+195
-5
lines changed

3 files changed

+195
-5
lines changed
 

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
182182

183183
// Expand float operations supported for scalars but not SIMD
184184
for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT,
185-
ISD::FCOPYSIGN}) {
185+
ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10,
186+
ISD::FEXP, ISD::FEXP2, ISD::FRINT}) {
186187
setOperationAction(Op, MVT::v4f32, Expand);
187188
if (Subtarget->hasUnimplementedSIMD128())
188189
setOperationAction(Op, MVT::v2f64, Expand);

‎llvm/test/CodeGen/WebAssembly/libcalls.ll

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,11 @@ declare fp128 @llvm.pow.f128(fp128, fp128)
1313

1414
declare double @llvm.cos.f64(double)
1515
declare double @llvm.log10.f64(double)
16+
declare double @llvm.pow.f64(double, double)
17+
declare double @llvm.log.f64(double)
18+
declare double @llvm.exp.f64(double)
19+
declare i32 @llvm.lround(double)
20+
1621

1722

1823
; CHECK-LABEL: fp128libcalls:
@@ -51,12 +56,20 @@ define i128 @i128libcalls(i128 %x, i128 %y) {
5156
}
5257

5358
; CHECK-LABEL: f64libcalls:
54-
define double @f64libcalls(double %x, double %y) {
59+
define i32 @f64libcalls(double %x, double %y) {
5560
; CHECK: f64.call $push{{[0-9]}}=, cos
5661
%a = call double @llvm.cos.f64(double %x)
5762
; CHECK: f64.call $push{{[0-9]}}=, log10
5863
%b = call double @llvm.log10.f64(double %a)
59-
ret double %b
64+
; CHECK: f64.call $push{{[0-9]}}=, pow
65+
%c = call double @llvm.pow.f64(double %b, double %y)
66+
; CHECK: f64.call $push{{[0-9]}}=, log
67+
%d = call double @llvm.log.f64(double %c)
68+
; CHECK: f64.call $push{{[0-9]}}=, exp
69+
%e = call double @llvm.exp.f64(double %d)
70+
; CHECK: i32.call $push{{[0-9]}}=, lround
71+
%f = call i32 @llvm.lround(double %e)
72+
ret i32 %f
6073
}
6174

6275
; fcmp ord and unord (RTLIB::O_F32 / RTLIB::UO_F32 etc) are a special case (see

‎llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

Lines changed: 178 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128 | FileCheck %s
22

3-
; Test that operations that are supported by MVP but not SIMD are
4-
; properly unrolled.
3+
; Test that operations that are not supported by SIMD are properly
4+
; unrolled.
55

66
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
77
target triple = "wasm32-unknown-unknown"
@@ -405,6 +405,94 @@ define <4 x float> @copysign_v4f32(<4 x float> %x, <4 x float> %y) {
405405
ret <4 x float> %v
406406
}
407407

408+
; CHECK-LABEL: sin_v4f32:
409+
; CHECK: f32.call $push[[L:[0-9]+]]=, sinf
410+
declare <4 x float> @llvm.sin.v4f32(<4 x float>)
411+
define <4 x float> @sin_v4f32(<4 x float> %x) {
412+
%v = call <4 x float> @llvm.sin.v4f32(<4 x float> %x)
413+
ret <4 x float> %v
414+
}
415+
416+
; CHECK-LABEL: cos_v4f32:
417+
; CHECK: f32.call $push[[L:[0-9]+]]=, cosf
418+
declare <4 x float> @llvm.cos.v4f32(<4 x float>)
419+
define <4 x float> @cos_v4f32(<4 x float> %x) {
420+
%v = call <4 x float> @llvm.cos.v4f32(<4 x float> %x)
421+
ret <4 x float> %v
422+
}
423+
424+
; CHECK-LABEL: powi_v4f32:
425+
; CHECK: f32.call $push[[L:[0-9]+]]=, __powisf2
426+
declare <4 x float> @llvm.powi.v4f32(<4 x float>, i32)
427+
define <4 x float> @powi_v4f32(<4 x float> %x, i32 %y) {
428+
%v = call <4 x float> @llvm.powi.v4f32(<4 x float> %x, i32 %y)
429+
ret <4 x float> %v
430+
}
431+
432+
; CHECK-LABEL: pow_v4f32:
433+
; CHECK: f32.call $push[[L:[0-9]+]]=, powf
434+
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
435+
define <4 x float> @pow_v4f32(<4 x float> %x, <4 x float> %y) {
436+
%v = call <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> %y)
437+
ret <4 x float> %v
438+
}
439+
440+
; CHECK-LABEL: log_v4f32:
441+
; CHECK: f32.call $push[[L:[0-9]+]]=, logf
442+
declare <4 x float> @llvm.log.v4f32(<4 x float>)
443+
define <4 x float> @log_v4f32(<4 x float> %x) {
444+
%v = call <4 x float> @llvm.log.v4f32(<4 x float> %x)
445+
ret <4 x float> %v
446+
}
447+
448+
; CHECK-LABEL: log2_v4f32:
449+
; CHECK: f32.call $push[[L:[0-9]+]]=, log2f
450+
declare <4 x float> @llvm.log2.v4f32(<4 x float>)
451+
define <4 x float> @log2_v4f32(<4 x float> %x) {
452+
%v = call <4 x float> @llvm.log2.v4f32(<4 x float> %x)
453+
ret <4 x float> %v
454+
}
455+
456+
; CHECK-LABEL: log10_v4f32:
457+
; CHECK: f32.call $push[[L:[0-9]+]]=, log10f
458+
declare <4 x float> @llvm.log10.v4f32(<4 x float>)
459+
define <4 x float> @log10_v4f32(<4 x float> %x) {
460+
%v = call <4 x float> @llvm.log10.v4f32(<4 x float> %x)
461+
ret <4 x float> %v
462+
}
463+
464+
; CHECK-LABEL: exp_v4f32:
465+
; CHECK: f32.call $push[[L:[0-9]+]]=, expf
466+
declare <4 x float> @llvm.exp.v4f32(<4 x float>)
467+
define <4 x float> @exp_v4f32(<4 x float> %x) {
468+
%v = call <4 x float> @llvm.exp.v4f32(<4 x float> %x)
469+
ret <4 x float> %v
470+
}
471+
472+
; CHECK-LABEL: exp2_v4f32:
473+
; CHECK: f32.call $push[[L:[0-9]+]]=, exp2f
474+
declare <4 x float> @llvm.exp2.v4f32(<4 x float>)
475+
define <4 x float> @exp2_v4f32(<4 x float> %x) {
476+
%v = call <4 x float> @llvm.exp2.v4f32(<4 x float> %x)
477+
ret <4 x float> %v
478+
}
479+
480+
; CHECK-LABEL: rint_v4f32:
481+
; CHECK: f32.nearest
482+
declare <4 x float> @llvm.rint.v4f32(<4 x float>)
483+
define <4 x float> @rint_v4f32(<4 x float> %x) {
484+
%v = call <4 x float> @llvm.rint.v4f32(<4 x float> %x)
485+
ret <4 x float> %v
486+
}
487+
488+
; CHECK-LABEL: round_v4f32:
489+
; CHECK: f32.call $push[[L:[0-9]+]]=, roundf
490+
declare <4 x float> @llvm.round.v4f32(<4 x float>)
491+
define <4 x float> @round_v4f32(<4 x float> %x) {
492+
%v = call <4 x float> @llvm.round.v4f32(<4 x float> %x)
493+
ret <4 x float> %v
494+
}
495+
408496
; ==============================================================================
409497
; 2 x f64
410498
; ==============================================================================
@@ -448,3 +536,91 @@ define <2 x double> @copysign_v2f64(<2 x double> %x, <2 x double> %y) {
448536
%v = call <2 x double> @llvm.copysign.v2f64(<2 x double> %x, <2 x double> %y)
449537
ret <2 x double> %v
450538
}
539+
540+
; CHECK-LABEL: sin_v2f64:
541+
; CHECK: f64.call $push[[L:[0-9]+]]=, sin
542+
declare <2 x double> @llvm.sin.v2f64(<2 x double>)
543+
define <2 x double> @sin_v2f64(<2 x double> %x) {
544+
%v = call <2 x double> @llvm.sin.v2f64(<2 x double> %x)
545+
ret <2 x double> %v
546+
}
547+
548+
; CHECK-LABEL: cos_v2f64:
549+
; CHECK: f64.call $push[[L:[0-9]+]]=, cos
550+
declare <2 x double> @llvm.cos.v2f64(<2 x double>)
551+
define <2 x double> @cos_v2f64(<2 x double> %x) {
552+
%v = call <2 x double> @llvm.cos.v2f64(<2 x double> %x)
553+
ret <2 x double> %v
554+
}
555+
556+
; CHECK-LABEL: powi_v2f64:
557+
; CHECK: f64.call $push[[L:[0-9]+]]=, __powidf2
558+
declare <2 x double> @llvm.powi.v2f64(<2 x double>, i32)
559+
define <2 x double> @powi_v2f64(<2 x double> %x, i32 %y) {
560+
%v = call <2 x double> @llvm.powi.v2f64(<2 x double> %x, i32 %y)
561+
ret <2 x double> %v
562+
}
563+
564+
; CHECK-LABEL: pow_v2f64:
565+
; CHECK: f64.call $push[[L:[0-9]+]]=, pow
566+
declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
567+
define <2 x double> @pow_v2f64(<2 x double> %x, <2 x double> %y) {
568+
%v = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> %y)
569+
ret <2 x double> %v
570+
}
571+
572+
; CHECK-LABEL: log_v2f64:
573+
; CHECK: f64.call $push[[L:[0-9]+]]=, log
574+
declare <2 x double> @llvm.log.v2f64(<2 x double>)
575+
define <2 x double> @log_v2f64(<2 x double> %x) {
576+
%v = call <2 x double> @llvm.log.v2f64(<2 x double> %x)
577+
ret <2 x double> %v
578+
}
579+
580+
; CHECK-LABEL: log2_v2f64:
581+
; CHECK: f64.call $push[[L:[0-9]+]]=, log2
582+
declare <2 x double> @llvm.log2.v2f64(<2 x double>)
583+
define <2 x double> @log2_v2f64(<2 x double> %x) {
584+
%v = call <2 x double> @llvm.log2.v2f64(<2 x double> %x)
585+
ret <2 x double> %v
586+
}
587+
588+
; CHECK-LABEL: log10_v2f64:
589+
; CHECK: f64.call $push[[L:[0-9]+]]=, log10
590+
declare <2 x double> @llvm.log10.v2f64(<2 x double>)
591+
define <2 x double> @log10_v2f64(<2 x double> %x) {
592+
%v = call <2 x double> @llvm.log10.v2f64(<2 x double> %x)
593+
ret <2 x double> %v
594+
}
595+
596+
; CHECK-LABEL: exp_v2f64:
597+
; CHECK: f64.call $push[[L:[0-9]+]]=, exp
598+
declare <2 x double> @llvm.exp.v2f64(<2 x double>)
599+
define <2 x double> @exp_v2f64(<2 x double> %x) {
600+
%v = call <2 x double> @llvm.exp.v2f64(<2 x double> %x)
601+
ret <2 x double> %v
602+
}
603+
604+
; CHECK-LABEL: exp2_v2f64:
605+
; CHECK: f64.call $push[[L:[0-9]+]]=, exp2
606+
declare <2 x double> @llvm.exp2.v2f64(<2 x double>)
607+
define <2 x double> @exp2_v2f64(<2 x double> %x) {
608+
%v = call <2 x double> @llvm.exp2.v2f64(<2 x double> %x)
609+
ret <2 x double> %v
610+
}
611+
612+
; CHECK-LABEL: rint_v2f64:
613+
; CHECK: f64.nearest
614+
declare <2 x double> @llvm.rint.v2f64(<2 x double>)
615+
define <2 x double> @rint_v2f64(<2 x double> %x) {
616+
%v = call <2 x double> @llvm.rint.v2f64(<2 x double> %x)
617+
ret <2 x double> %v
618+
}
619+
620+
; CHECK-LABEL: round_v2f64:
621+
; CHECK: f64.call $push[[L:[0-9]+]]=, round
622+
declare <2 x double> @llvm.round.v2f64(<2 x double>)
623+
define <2 x double> @round_v2f64(<2 x double> %x) {
624+
%v = call <2 x double> @llvm.round.v2f64(<2 x double> %x)
625+
ret <2 x double> %v
626+
}

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