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| 1 | +; RUN: opt -arm-codegenprepare -arm-disable-cgp=false -mtriple=armv8 -verify %s -S -o - | FileCheck %s |
| 2 | + |
| 3 | +; CHECK: clear_structures |
| 4 | +define i32 @clear_structures(i8* nocapture readonly %fmt, [1 x i32] %ap.coerce, i8* %out, void (i32, i8*)* nocapture %write) { |
| 5 | +entry: |
| 6 | + br label %while.cond.outer |
| 7 | + |
| 8 | +while.cond.outer: |
| 9 | + %fmt.addr.0.ph = phi i8* [ %fmt, %entry ], [ %fmt.addr.3, %while.cond.outer.backedge ] |
| 10 | + %0 = load i8, i8* %fmt.addr.0.ph, align 1 |
| 11 | + br label %while.cond |
| 12 | + |
| 13 | +while.cond: |
| 14 | + switch i8 %0, label %while.cond [ |
| 15 | + i8 0, label %while.end48 |
| 16 | + i8 37, label %while.cond2 |
| 17 | + ] |
| 18 | + |
| 19 | +while.cond2: |
| 20 | + %flags.0 = phi i32 [ %or, %while.cond2 ], [ 0, %while.cond ] |
| 21 | + %fmt.addr.0.pn = phi i8* [ %fmt.addr.1, %while.cond2 ], [ %fmt.addr.0.ph, %while.cond ] |
| 22 | + %fmt.addr.1 = getelementptr inbounds i8, i8* %fmt.addr.0.pn, i32 1 |
| 23 | + %1 = load i8, i8* %fmt.addr.1, align 1 |
| 24 | + ; CHECK: add i8 [[LOAD:%[^ ]+]], -32 |
| 25 | + %sub = add i8 %1, -32 |
| 26 | + %conv6 = zext i8 %sub to i32 |
| 27 | + %shl = shl i32 1, %conv6 |
| 28 | + %and = and i32 %shl, 75785 |
| 29 | + %tobool7 = icmp eq i32 %and, 0 |
| 30 | + %or = or i32 %shl, %flags.0 |
| 31 | + br i1 %tobool7, label %while.cond10.preheader, label %while.cond2 |
| 32 | + |
| 33 | +while.cond10.preheader: |
| 34 | + ; CHECK: [[ADD:%[^ ]+]] = add i8 [[LOAD]], -48 |
| 35 | + ; CHECK: icmp ult i8 [[ADD]], 10 |
| 36 | + %.off = add i8 %1, -48 |
| 37 | + %2 = icmp ult i8 %.off, 10 |
| 38 | + br i1 %2, label %while.cond10, label %while.end18.split |
| 39 | + |
| 40 | +while.cond10: |
| 41 | + br label %while.cond10 |
| 42 | + |
| 43 | +while.end18.split: |
| 44 | + %cmp20 = icmp eq i8 %1, 46 |
| 45 | + br i1 %cmp20, label %if.then22, label %cond.end |
| 46 | + |
| 47 | +if.then22: |
| 48 | + %incdec.ptr23 = getelementptr inbounds i8, i8* %fmt.addr.0.pn, i32 2 |
| 49 | + %.pr74 = load i8, i8* %incdec.ptr23, align 1 |
| 50 | + ; CHECK: [[LOAD2:[^ ]+]] = load i8, i8* |
| 51 | + ; CHECK: [[ZEXT:[^ ]+]] = zext i8 [[LOAD2]] to i32 |
| 52 | + ; CHECK: sub i32 [[ZEXT]], 48 |
| 53 | + %.pr74.off = add i8 %.pr74, -48 |
| 54 | + %3 = icmp ult i8 %.pr74.off, 10 |
| 55 | + br i1 %3, label %while.cond24, label %cond.end |
| 56 | + |
| 57 | +while.cond24: |
| 58 | + br label %while.cond24 |
| 59 | + |
| 60 | +cond.end: |
| 61 | + %fmt.addr.3 = phi i8* [ %fmt.addr.1, %while.end18.split ], [ %incdec.ptr23, %if.then22 ] |
| 62 | + %and39 = and i32 %flags.0, 2048 |
| 63 | + %tobool40 = icmp eq i32 %and39, 0 |
| 64 | + br i1 %tobool40, label %while.cond.outer.backedge, label %if.then43 |
| 65 | + |
| 66 | +while.cond.outer.backedge: |
| 67 | + br label %while.cond.outer |
| 68 | + |
| 69 | +if.then43: |
| 70 | + tail call void %write(i32 43, i8* %out) #1 |
| 71 | + br label %while.cond.outer.backedge |
| 72 | + |
| 73 | +while.end48: |
| 74 | + ret i32 undef |
| 75 | +} |
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