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Commit 617cdc5

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committedMay 23, 2019
[ARM][CGP] Clear SafeWrap before each search
The previous patch added a member set to store instructions that we could allow to wrap. But this wasn't cleared between searches meaning that they could get promoted, incorrectly, during the promotion of a separate valid chain. Differential Revision: https://reviews.llvm.org/D62254 llvm-svn: 361462
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‎llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp

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@@ -906,6 +906,7 @@ bool ARMCodeGenPrepare::TryToPromote(Value *V) {
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return false;
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SafeToPromote.clear();
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SafeWrap.clear();
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if (!isSupportedValue(V) || !shouldPromote(V) || !isLegalToPromote(V))
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return false;
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@@ -0,0 +1,75 @@
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; RUN: opt -arm-codegenprepare -arm-disable-cgp=false -mtriple=armv8 -verify %s -S -o - | FileCheck %s
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; CHECK: clear_structures
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define i32 @clear_structures(i8* nocapture readonly %fmt, [1 x i32] %ap.coerce, i8* %out, void (i32, i8*)* nocapture %write) {
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entry:
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br label %while.cond.outer
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while.cond.outer:
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%fmt.addr.0.ph = phi i8* [ %fmt, %entry ], [ %fmt.addr.3, %while.cond.outer.backedge ]
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%0 = load i8, i8* %fmt.addr.0.ph, align 1
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br label %while.cond
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while.cond:
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switch i8 %0, label %while.cond [
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i8 0, label %while.end48
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i8 37, label %while.cond2
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]
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while.cond2:
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%flags.0 = phi i32 [ %or, %while.cond2 ], [ 0, %while.cond ]
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%fmt.addr.0.pn = phi i8* [ %fmt.addr.1, %while.cond2 ], [ %fmt.addr.0.ph, %while.cond ]
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%fmt.addr.1 = getelementptr inbounds i8, i8* %fmt.addr.0.pn, i32 1
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%1 = load i8, i8* %fmt.addr.1, align 1
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; CHECK: add i8 [[LOAD:%[^ ]+]], -32
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%sub = add i8 %1, -32
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%conv6 = zext i8 %sub to i32
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%shl = shl i32 1, %conv6
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%and = and i32 %shl, 75785
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%tobool7 = icmp eq i32 %and, 0
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%or = or i32 %shl, %flags.0
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br i1 %tobool7, label %while.cond10.preheader, label %while.cond2
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while.cond10.preheader:
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; CHECK: [[ADD:%[^ ]+]] = add i8 [[LOAD]], -48
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; CHECK: icmp ult i8 [[ADD]], 10
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%.off = add i8 %1, -48
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%2 = icmp ult i8 %.off, 10
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br i1 %2, label %while.cond10, label %while.end18.split
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while.cond10:
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br label %while.cond10
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while.end18.split:
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%cmp20 = icmp eq i8 %1, 46
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br i1 %cmp20, label %if.then22, label %cond.end
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if.then22:
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%incdec.ptr23 = getelementptr inbounds i8, i8* %fmt.addr.0.pn, i32 2
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%.pr74 = load i8, i8* %incdec.ptr23, align 1
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; CHECK: [[LOAD2:[^ ]+]] = load i8, i8*
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; CHECK: [[ZEXT:[^ ]+]] = zext i8 [[LOAD2]] to i32
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; CHECK: sub i32 [[ZEXT]], 48
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%.pr74.off = add i8 %.pr74, -48
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%3 = icmp ult i8 %.pr74.off, 10
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br i1 %3, label %while.cond24, label %cond.end
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while.cond24:
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br label %while.cond24
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cond.end:
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%fmt.addr.3 = phi i8* [ %fmt.addr.1, %while.end18.split ], [ %incdec.ptr23, %if.then22 ]
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%and39 = and i32 %flags.0, 2048
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%tobool40 = icmp eq i32 %and39, 0
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br i1 %tobool40, label %while.cond.outer.backedge, label %if.then43
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while.cond.outer.backedge:
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br label %while.cond.outer
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if.then43:
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tail call void %write(i32 43, i8* %out) #1
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br label %while.cond.outer.backedge
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while.end48:
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ret i32 undef
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}

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