[AArch64] Use LL for 64-bit intrinsic arguments

sparker-arm · sparker-arm · commit a96f8461e715 · 2019-01-21T11:01:05.000Z
The ACLE states that 64-bit crc32, wsr, rsr and rbit operands are uint64_t so we should have the clang builtin match this description - which is what we already do for AArch32. Differential Revision: https://reviews.llvm.org/D56852 llvm-svn: 351740
diff --git a/clang/include/clang/Basic/BuiltinsAArch64.def b/clang/include/clang/Basic/BuiltinsAArch64.def
@@ -32,7 +32,7 @@ BUILTIN(__builtin_arm_clrex, "v", "")
 
 // Bit manipulation
 BUILTIN(__builtin_arm_rbit, "UiUi", "nc")
-BUILTIN(__builtin_arm_rbit64, "LUiLUi", "nc")
+BUILTIN(__builtin_arm_rbit64, "LLUiLLUi", "nc")
 
 // HINT
 BUILTIN(__builtin_arm_nop, "v", "")
@@ -49,8 +49,8 @@ BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc")
 BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc")
 BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc")
 BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc")
-BUILTIN(__builtin_arm_crc32d, "UiUiLUi", "nc")
-BUILTIN(__builtin_arm_crc32cd, "UiUiLUi", "nc")
+BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc")
+BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc")
 
 // Memory barrier
 BUILTIN(__builtin_arm_dmb, "vUi", "nc")
@@ -62,10 +62,10 @@ BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc")
 
 // System Registers
 BUILTIN(__builtin_arm_rsr, "UicC*", "nc")
-BUILTIN(__builtin_arm_rsr64, "LUicC*", "nc")
+BUILTIN(__builtin_arm_rsr64, "LLUicC*", "nc")
 BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc")
 BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc")
-BUILTIN(__builtin_arm_wsr64, "vcC*LUi", "nc")
+BUILTIN(__builtin_arm_wsr64, "vcC*LLUi", "nc")
 BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc")
 
 // MSVC
diff --git a/clang/test/CodeGen/arm64-crc32.c b/clang/test/CodeGen/arm64-crc32.c
@@ -1,54 +1,57 @@
 // REQUIRES: aarch64-registered-target
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu \
 // RUN:  -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-windows \
+// RUN:  -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+#include <stdint.h>
 
-int crc32b(int a, char b)
+uint32_t crc32b(uint32_t a, uint8_t b)
 {
         return __builtin_arm_crc32b(a,b);
 // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
 // CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
 }
 
-int crc32cb(int a, char b)
+uint32_t crc32cb(uint32_t a, uint8_t b)
 {
         return __builtin_arm_crc32cb(a,b);
 // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
 // CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
 }
 
-int crc32h(int a, short b)
+uint32_t crc32h(uint32_t a, uint16_t b)
 {
         return __builtin_arm_crc32h(a,b);
 // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
 // CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
 }
 
-int crc32ch(int a, short b)
+uint32_t crc32ch(uint32_t a, uint16_t b)
 {
         return __builtin_arm_crc32ch(a,b);
 // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
 // CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
 }
 
-int crc32w(int a, int b)
+uint32_t crc32w(uint32_t a, uint32_t b)
 {
         return __builtin_arm_crc32w(a,b);
 // CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
 }
 
-int crc32cw(int a, int b)
+uint32_t crc32cw(uint32_t a, uint32_t b)
 {
         return __builtin_arm_crc32cw(a,b);
 // CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
 }
 
-int crc32d(int a, long b)
+uint32_t crc32d(uint32_t a, uint64_t b)
 {
         return __builtin_arm_crc32d(a,b);
 // CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
 }
 
-int crc32cd(int a, long b)
+uint32_t crc32cd(uint32_t a, uint64_t b)
 {
         return __builtin_arm_crc32cd(a,b);
 // CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)
diff --git a/clang/test/CodeGen/builtins-arm64.c b/clang/test/CodeGen/builtins-arm64.c
@@ -1,4 +1,6 @@
 // RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-windows -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+#include <stdint.h>
 
 void f0(void *a, void *b) {
 	__clear_cache(a,b);
@@ -55,7 +57,7 @@ unsigned rsr() {
   return __builtin_arm_rsr("1:2:3:4:5");
 }
 
-unsigned long rsr64() {
+uint64_t rsr64() {
   // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
   return __builtin_arm_rsr64("1:2:3:4:5");
 }
@@ -72,7 +74,7 @@ void wsr(unsigned v) {
   __builtin_arm_wsr("1:2:3:4:5", v);
 }
 
-void wsr64(unsigned long v) {
+void wsr64(uint64_t v) {
   // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v)
   __builtin_arm_wsr64("1:2:3:4:5", v);
 }

Original file line number	Diff line number	Diff line change
`@@ -1,54 +1,57 @@`
`1`	`1`	`// REQUIRES: aarch64-registered-target`
`2`	`2`	`// RUN: %clang_cc1 -triple arm64-none-linux-gnu \`
`3`	`3`	`// RUN: -disable-O0-optnone -S -emit-llvm -o - %s \| opt -S -mem2reg \| FileCheck %s`
	`4`	`+// RUN: %clang_cc1 -triple aarch64-windows \`
	`5`	`+// RUN: -disable-O0-optnone -S -emit-llvm -o - %s \| opt -S -mem2reg \| FileCheck %s`
	`6`	`+#include <stdint.h>`
`4`	`7`
`5`		`-int crc32b(int a, char b)`
	`8`	`+uint32_t crc32b(uint32_t a, uint8_t b)`
`6`	`9`	`{`
`7`	`10`	`return __builtin_arm_crc32b(a,b);`
`8`	`11`	`// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32`
`9`	`12`	`// CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])`
`10`	`13`	`}`
`11`	`14`
`12`		`-int crc32cb(int a, char b)`
	`15`	`+uint32_t crc32cb(uint32_t a, uint8_t b)`
`13`	`16`	`{`
`14`	`17`	`return __builtin_arm_crc32cb(a,b);`
`15`	`18`	`// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32`
`16`	`19`	`// CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])`
`17`	`20`	`}`
`18`	`21`
`19`		`-int crc32h(int a, short b)`
	`22`	`+uint32_t crc32h(uint32_t a, uint16_t b)`
`20`	`23`	`{`
`21`	`24`	`return __builtin_arm_crc32h(a,b);`
`22`	`25`	`// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32`
`23`	`26`	`// CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])`
`24`	`27`	`}`
`25`	`28`
`26`		`-int crc32ch(int a, short b)`
	`29`	`+uint32_t crc32ch(uint32_t a, uint16_t b)`
`27`	`30`	`{`
`28`	`31`	`return __builtin_arm_crc32ch(a,b);`
`29`	`32`	`// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32`
`30`	`33`	`// CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])`
`31`	`34`	`}`
`32`	`35`
`33`		`-int crc32w(int a, int b)`
	`36`	`+uint32_t crc32w(uint32_t a, uint32_t b)`
`34`	`37`	`{`
`35`	`38`	`return __builtin_arm_crc32w(a,b);`
`36`	`39`	`// CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)`
`37`	`40`	`}`
`38`	`41`
`39`		`-int crc32cw(int a, int b)`
	`42`	`+uint32_t crc32cw(uint32_t a, uint32_t b)`
`40`	`43`	`{`
`41`	`44`	`return __builtin_arm_crc32cw(a,b);`
`42`	`45`	`// CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)`
`43`	`46`	`}`
`44`	`47`
`45`		`-int crc32d(int a, long b)`
	`48`	`+uint32_t crc32d(uint32_t a, uint64_t b)`
`46`	`49`	`{`
`47`	`50`	`return __builtin_arm_crc32d(a,b);`
`48`	`51`	`// CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)`
`49`	`52`	`}`
`50`	`53`
`51`		`-int crc32cd(int a, long b)`
	`54`	`+uint32_t crc32cd(uint32_t a, uint64_t b)`
`52`	`55`	`{`
`53`	`56`	`return __builtin_arm_crc32cd(a,b);`
`54`	`57`	`// CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,6 @@`
`1`	`1`	`// RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s \| opt -S -mem2reg \| FileCheck %s`
	`2`	`+// RUN: %clang_cc1 -triple aarch64-windows -disable-O0-optnone -emit-llvm -o - %s \| opt -S -mem2reg \| FileCheck %s`
	`3`	`+#include <stdint.h>`
`2`	`4`
`3`	`5`	`void f0(void a, void b) {`
`4`	`6`	`__clear_cache(a,b);`
`@@ -55,7 +57,7 @@ unsigned rsr() {`
`55`	`57`	`return __builtin_arm_rsr("1:2:3:4:5");`
`56`	`58`	`}`
`57`	`59`
`58`		`-unsigned long rsr64() {`
	`60`	`+uint64_t rsr64() {`
`59`	`61`	`// CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])`
`60`	`62`	`return __builtin_arm_rsr64("1:2:3:4:5");`
`61`	`63`	`}`
`@@ -72,7 +74,7 @@ void wsr(unsigned v) {`
`72`	`74`	`__builtin_arm_wsr("1:2:3:4:5", v);`
`73`	`75`	`}`
`74`	`76`
`75`		`-void wsr64(unsigned long v) {`
	`77`	`+void wsr64(uint64_t v) {`
`76`	`78`	`// CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v)`
`77`	`79`	`__builtin_arm_wsr64("1:2:3:4:5", v);`
`78`	`80`	`}`