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jedilynjedilyn
committedDec 15, 2018
[Power9][NFC] add setb exploitation test case
Add an original test case for setb before the exploitation actually takes effect, later we can check the difference. Differential Revision: https://reviews.llvm.org/D55696 llvm-svn: 349251
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‎llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll

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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -enable-ppc-quad-precision -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s -check-prefix=CHECK-PWR8 \
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; RUN: -implicit-check-not "\<setb\>"
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; Test different patterns with type i64
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; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
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define i64 @setb1(i64 %a, i64 %b) {
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%t1 = icmp slt i64 %a, %b
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%t2 = icmp ne i64 %a, %b
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb1
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: addic
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; CHECK-DAG: subfe
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb1
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: addic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
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define i64 @setb2(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %b, %a
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%t2 = icmp ne i64 %a, %b
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb2
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: addic
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; CHECK-DAG: subfe
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb2
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: addic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
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define i64 @setb3(i64 %a, i64 %b) {
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%t1 = icmp slt i64 %a, %b
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%t2 = icmp ne i64 %b, %a
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb3
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: addic
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; CHECK-DAG: subfe
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb3
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: addic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
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define i64 @setb4(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %b, %a
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%t2 = icmp ne i64 %b, %a
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb4
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: addic
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; CHECK-DAG: subfe
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb4
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: addic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
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define i64 @setb5(i64 %a, i64 %b) {
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%t1 = icmp slt i64 %a, %b
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%t2 = icmp sgt i64 %a, %b
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb5
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; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfc
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; CHECK-DAG: adde
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; CHECK-DAG: xori
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb5
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; CHECK-PWR8-DAG: sradi
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; CHECK-PWR8-DAG: rldicl
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfc
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; CHECK-PWR8-DAG: adde
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; CHECK-PWR8-DAG: xori
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
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define i64 @setb6(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %b, %a
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%t2 = icmp sgt i64 %a, %b
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb6
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; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfc
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; CHECK-DAG: adde
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; CHECK-DAG: xori
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb6
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; CHECK-PWR8-DAG: sradi
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; CHECK-PWR8-DAG: rldicl
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfc
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; CHECK-PWR8-DAG: adde
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; CHECK-PWR8-DAG: xori
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
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define i64 @setb7(i64 %a, i64 %b) {
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%t1 = icmp slt i64 %a, %b
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%t2 = icmp slt i64 %b, %a
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb7
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; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfc
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; CHECK-DAG: adde
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; CHECK-DAG: xori
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb7
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; CHECK-PWR8-DAG: sradi
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; CHECK-PWR8-DAG: rldicl
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfc
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; CHECK-PWR8-DAG: adde
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; CHECK-PWR8-DAG: xori
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
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define i64 @setb8(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %b, %a
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%t2 = icmp slt i64 %b, %a
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%t3 = zext i1 %t2 to i64
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%t4 = select i1 %t1, i64 -1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb8
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; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfc
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; CHECK-DAG: adde
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; CHECK-DAG: xori
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb8
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; CHECK-PWR8-DAG: sradi
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; CHECK-PWR8-DAG: rldicl
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfc
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; CHECK-PWR8-DAG: adde
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; CHECK-PWR8-DAG: xori
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setgt
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define i64 @setb9(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %a, %b
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%t2 = icmp ne i64 %a, %b
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%t3 = sext i1 %t2 to i64
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%t4 = select i1 %t1, i64 1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb9
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfic
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; CHECK-DAG: subfe
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; CHECK-DAG: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb9
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setlt
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define i64 @setb10(i64 %a, i64 %b) {
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%t1 = icmp slt i64 %b, %a
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%t2 = icmp ne i64 %a, %b
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%t3 = sext i1 %t2 to i64
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%t4 = select i1 %t1, i64 1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb10
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfic
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; CHECK-DAG: subfe
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; CHECK-DAG: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb10
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setgt
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define i64 @setb11(i64 %a, i64 %b) {
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%t1 = icmp sgt i64 %a, %b
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%t2 = icmp ne i64 %b, %a
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%t3 = sext i1 %t2 to i64
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%t4 = select i1 %t1, i64 1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb11
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfic
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; CHECK-DAG: subfe
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; CHECK-DAG: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb11
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setlt
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define i64 @setb12(i64 %a, i64 %b) {
302+
%t1 = icmp slt i64 %b, %a
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%t2 = icmp ne i64 %b, %a
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%t3 = sext i1 %t2 to i64
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%t4 = select i1 %t1, i64 1, i64 %t3
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ret i64 %t4
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; CHECK-LABEL: setb12
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; CHECK-DAG: xor
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfic
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; CHECK-DAG: subfe
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; CHECK-DAG: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb12
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; CHECK-PWR8-DAG: xor
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
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; CHECK-PWR8-DAG: subfic
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; CHECK-PWR8-DAG: subfe
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setlt)), setgt
326+
define i64 @setb13(i64 %a, i64 %b) {
327+
%t1 = icmp sgt i64 %a, %b
328+
%t2 = icmp slt i64 %a, %b
329+
%t3 = sext i1 %t2 to i64
330+
%t4 = select i1 %t1, i64 1, i64 %t3
331+
ret i64 %t4
332+
; CHECK-LABEL: setb13
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; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
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; CHECK-DAG: li
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; CHECK-DAG: cmpd
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; CHECK-DAG: subfc
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; CHECK-DAG: adde
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; CHECK-DAG: xori
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; CHECK-DAG: neg
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; CHECK: isel
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; CHECK: blr
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; CHECK-PWR8-LABEL: setb13
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; CHECK-PWR8-DAG: sradi
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; CHECK-PWR8-DAG: rldicl
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; CHECK-PWR8-DAG: li
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; CHECK-PWR8-DAG: cmpd
348+
; CHECK-PWR8-DAG: subfc
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; CHECK-PWR8-DAG: adde
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; CHECK-PWR8-DAG: xori
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; CHECK-PWR8-DAG: neg
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; CHECK-PWR8: isel
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; CHECK-PWR8: blr
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}
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; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setlt)), setlt
357+
define i64 @setb14(i64 %a, i64 %b) {
358+
%t1 = icmp slt i64 %b, %a
359+
%t2 = icmp slt i64 %a, %b
360+
%t3 = sext i1 %t2 to i64
361+
%t4 = select i1 %t1, i64 1, i64 %t3
362+
ret i64 %t4
363+
; CHECK-LABEL: setb14
364+
; CHECK-DAG: sradi
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; CHECK-DAG: rldicl
366+
; CHECK-DAG: li
367+
; CHECK-DAG: cmpd
368+
; CHECK-DAG: subfc
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; CHECK-DAG: adde
370+
; CHECK-DAG: xori
371+
; CHECK-DAG: neg
372+
; CHECK: isel
373+
; CHECK: blr
374+
; CHECK-PWR8-LABEL: setb14
375+
; CHECK-PWR8-DAG: sradi
376+
; CHECK-PWR8-DAG: rldicl
377+
; CHECK-PWR8-DAG: li
378+
; CHECK-PWR8-DAG: cmpd
379+
; CHECK-PWR8-DAG: subfc
380+
; CHECK-PWR8-DAG: adde
381+
; CHECK-PWR8-DAG: xori
382+
; CHECK-PWR8-DAG: neg
383+
; CHECK-PWR8: isel
384+
; CHECK-PWR8: blr
385+
}
386+
387+
; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setgt)), setgt
388+
define i64 @setb15(i64 %a, i64 %b) {
389+
%t1 = icmp sgt i64 %a, %b
390+
%t2 = icmp sgt i64 %b, %a
391+
%t3 = sext i1 %t2 to i64
392+
%t4 = select i1 %t1, i64 1, i64 %t3
393+
ret i64 %t4
394+
; CHECK-LABEL: setb15
395+
; CHECK-DAG: sradi
396+
; CHECK-DAG: rldicl
397+
; CHECK-DAG: li
398+
; CHECK-DAG: cmpd
399+
; CHECK-DAG: subfc
400+
; CHECK-DAG: adde
401+
; CHECK-DAG: xori
402+
; CHECK-DAG: neg
403+
; CHECK: isel
404+
; CHECK: blr
405+
; CHECK-PWR8-LABEL: setb15
406+
; CHECK-PWR8-DAG: sradi
407+
; CHECK-PWR8-DAG: rldicl
408+
; CHECK-PWR8-DAG: li
409+
; CHECK-PWR8-DAG: cmpd
410+
; CHECK-PWR8-DAG: subfc
411+
; CHECK-PWR8-DAG: adde
412+
; CHECK-PWR8-DAG: xori
413+
; CHECK-PWR8-DAG: neg
414+
; CHECK-PWR8: isel
415+
; CHECK-PWR8: blr
416+
}
417+
418+
; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
419+
define i64 @setb16(i64 %a, i64 %b) {
420+
%t1 = icmp slt i64 %b, %a
421+
%t2 = icmp sgt i64 %b, %a
422+
%t3 = sext i1 %t2 to i64
423+
%t4 = select i1 %t1, i64 1, i64 %t3
424+
ret i64 %t4
425+
; CHECK-LABEL: setb16
426+
; CHECK-DAG: sradi
427+
; CHECK-DAG: rldicl
428+
; CHECK-DAG: li
429+
; CHECK-DAG: cmpd
430+
; CHECK-DAG: subfc
431+
; CHECK-DAG: adde
432+
; CHECK-DAG: xori
433+
; CHECK-DAG: neg
434+
; CHECK: isel
435+
; CHECK: blr
436+
; CHECK-PWR8-LABEL: setb16
437+
; CHECK-PWR8-DAG: sradi
438+
; CHECK-PWR8-DAG: rldicl
439+
; CHECK-PWR8-DAG: li
440+
; CHECK-PWR8-DAG: cmpd
441+
; CHECK-PWR8-DAG: subfc
442+
; CHECK-PWR8-DAG: adde
443+
; CHECK-PWR8-DAG: xori
444+
; CHECK-PWR8-DAG: neg
445+
; CHECK-PWR8: isel
446+
; CHECK-PWR8: blr
447+
}
448+
449+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setgt), seteq
450+
define i64 @setb17(i64 %a, i64 %b) {
451+
%t1 = icmp eq i64 %a, %b
452+
%t2 = icmp sgt i64 %a, %b
453+
%t3 = select i1 %t2, i64 1, i64 -1
454+
%t4 = select i1 %t1, i64 0, i64 %t3
455+
ret i64 %t4
456+
; CHECK-LABEL: setb17
457+
; CHECK-DAG: li
458+
; CHECK-DAG: li
459+
; CHECK-DAG: cmpd
460+
; CHECK: isel
461+
; CHECK: cmpld
462+
; CHECK: isel
463+
; CHECK: blr
464+
; CHECK-PWR8-LABEL: setb17
465+
; CHECK-PWR8: cmpd
466+
; CHECK-PWR8: isel
467+
; CHECK-PWR8: cmpld
468+
; CHECK-PWR8: isel
469+
; CHECK-PWR8: blr
470+
}
471+
472+
; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setgt), seteq
473+
define i64 @setb18(i64 %a, i64 %b) {
474+
%t1 = icmp eq i64 %b, %a
475+
%t2 = icmp sgt i64 %a, %b
476+
%t3 = select i1 %t2, i64 1, i64 -1
477+
%t4 = select i1 %t1, i64 0, i64 %t3
478+
ret i64 %t4
479+
; CHECK-LABEL: setb18
480+
; CHECK-DAG: li
481+
; CHECK-DAG: li
482+
; CHECK-DAG: cmpd
483+
; CHECK: isel
484+
; CHECK: cmpld
485+
; CHECK: isel
486+
; CHECK: blr
487+
; CHECK-PWR8-LABEL: setb18
488+
; CHECK-PWR8: cmpd
489+
; CHECK-PWR8: isel
490+
; CHECK-PWR8: cmpld
491+
; CHECK-PWR8: isel
492+
; CHECK-PWR8: blr
493+
}
494+
495+
; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setlt), seteq
496+
define i64 @setb19(i64 %a, i64 %b) {
497+
%t1 = icmp eq i64 %a, %b
498+
%t2 = icmp slt i64 %b, %a
499+
%t3 = select i1 %t2, i64 1, i64 -1
500+
%t4 = select i1 %t1, i64 0, i64 %t3
501+
ret i64 %t4
502+
; CHECK-LABEL: setb19
503+
; CHECK-DAG: li
504+
; CHECK-DAG: li
505+
; CHECK-DAG: cmpd
506+
; CHECK: isel
507+
; CHECK: cmpld
508+
; CHECK: isel
509+
; CHECK: blr
510+
; CHECK-PWR8-LABEL: setb19
511+
; CHECK-PWR8: cmpd
512+
; CHECK-PWR8: isel
513+
; CHECK-PWR8: cmpld
514+
; CHECK-PWR8: isel
515+
; CHECK-PWR8: blr
516+
}
517+
518+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setlt), seteq
519+
define i64 @setb20(i64 %a, i64 %b) {
520+
%t1 = icmp eq i64 %b, %a
521+
%t2 = icmp slt i64 %b, %a
522+
%t3 = select i1 %t2, i64 1, i64 -1
523+
%t4 = select i1 %t1, i64 0, i64 %t3
524+
ret i64 %t4
525+
; CHECK-LABEL: setb20
526+
; CHECK-DAG: li
527+
; CHECK-DAG: li
528+
; CHECK-DAG: cmpd
529+
; CHECK: isel
530+
; CHECK: cmpld
531+
; CHECK: isel
532+
; CHECK: blr
533+
; CHECK-PWR8-LABEL: setb20
534+
; CHECK-PWR8: cmpd
535+
; CHECK-PWR8: isel
536+
; CHECK-PWR8: cmpld
537+
; CHECK-PWR8: isel
538+
; CHECK-PWR8: blr
539+
}
540+
541+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setlt), seteq
542+
define i64 @setb21(i64 %a, i64 %b) {
543+
%t1 = icmp eq i64 %a, %b
544+
%t2 = icmp slt i64 %a, %b
545+
%t3 = select i1 %t2, i64 -1, i64 1
546+
%t4 = select i1 %t1, i64 0, i64 %t3
547+
ret i64 %t4
548+
; CHECK-LABEL: setb21
549+
; CHECK-DAG: li
550+
; CHECK-DAG: li
551+
; CHECK-DAG: cmpd
552+
; CHECK: isel
553+
; CHECK: cmpld
554+
; CHECK: isel
555+
; CHECK: blr
556+
; CHECK-PWR8-LABEL: setb21
557+
; CHECK-PWR8: cmpd
558+
; CHECK-PWR8: isel
559+
; CHECK-PWR8: cmpld
560+
; CHECK-PWR8: isel
561+
; CHECK-PWR8: blr
562+
}
563+
564+
; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setlt), seteq
565+
define i64 @setb22(i64 %a, i64 %b) {
566+
%t1 = icmp eq i64 %b, %a
567+
%t2 = icmp slt i64 %a, %b
568+
%t3 = select i1 %t2, i64 -1, i64 1
569+
%t4 = select i1 %t1, i64 0, i64 %t3
570+
ret i64 %t4
571+
; CHECK-LABEL: setb22
572+
; CHECK-DAG: li
573+
; CHECK-DAG: li
574+
; CHECK-DAG: cmpd
575+
; CHECK-DAG: isel
576+
; CHECK-DAG: cmpld
577+
; CHECK: isel
578+
; CHECK: blr
579+
; CHECK-PWR8-LABEL: setb22
580+
; CHECK-PWR8: cmpd
581+
; CHECK-PWR8: isel
582+
; CHECK-PWR8: cmpld
583+
; CHECK-PWR8: isel
584+
; CHECK-PWR8: blr
585+
}
586+
587+
; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
588+
define i64 @setb23(i64 %a, i64 %b) {
589+
%t1 = icmp eq i64 %a, %b
590+
%t2 = icmp sgt i64 %b, %a
591+
%t3 = select i1 %t2, i64 -1, i64 1
592+
%t4 = select i1 %t1, i64 0, i64 %t3
593+
ret i64 %t4
594+
; CHECK-LABEL: setb23
595+
; CHECK-DAG: li
596+
; CHECK-DAG: li
597+
; CHECK-DAG: cmpd
598+
; CHECK: isel
599+
; CHECK: cmpld
600+
; CHECK: isel
601+
; CHECK: blr
602+
; CHECK-PWR8-LABEL: setb23
603+
; CHECK-PWR8: cmpd
604+
; CHECK-PWR8: isel
605+
; CHECK-PWR8: cmpld
606+
; CHECK-PWR8: isel
607+
; CHECK-PWR8: blr
608+
}
609+
610+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
611+
define i64 @setb24(i64 %a, i64 %b) {
612+
%t1 = icmp eq i64 %b, %a
613+
%t2 = icmp sgt i64 %b, %a
614+
%t3 = select i1 %t2, i64 -1, i64 1
615+
%t4 = select i1 %t1, i64 0, i64 %t3
616+
ret i64 %t4
617+
; CHECK-LABEL: setb24
618+
; CHECK-DAG: li
619+
; CHECK-DAG: li
620+
; CHECK-DAG: cmpd
621+
; CHECK: isel
622+
; CHECK: cmpld
623+
; CHECK: isel
624+
; CHECK: blr
625+
; CHECK-PWR8-LABEL: setb24
626+
; CHECK-PWR8: cmpd
627+
; CHECK-PWR8: isel
628+
; CHECK-PWR8: cmpld
629+
; CHECK-PWR8: isel
630+
; CHECK-PWR8: blr
631+
}
632+
; end all patterns testing for i64
633+
634+
; Test with swapping the input parameters
635+
636+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
637+
define i64 @setb25(i64 %a, i64 %b) {
638+
%t1 = icmp slt i64 %b, %a
639+
%t2 = icmp ne i64 %b, %a
640+
%t3 = zext i1 %t2 to i64
641+
%t4 = select i1 %t1, i64 -1, i64 %t3
642+
ret i64 %t4
643+
; CHECK-LABEL: setb25
644+
; CHECK-DAG: xor
645+
; CHECK-DAG: li
646+
; CHECK-DAG: cmpd
647+
; CHECK-DAG: addic
648+
; CHECK-DAG: subfe
649+
; CHECK: isel
650+
; CHECK: blr
651+
; CHECK-PWR8-LABEL: setb25
652+
; CHECK-PWR8-DAG: cmpd
653+
; CHECK-PWR8-DAG: addic
654+
; CHECK-PWR8-DAG: subfe
655+
; CHECK-PWR8: isel
656+
; CHECK-PWR8: blr
657+
}
658+
659+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
660+
define i64 @setb26(i64 %a, i64 %b) {
661+
%t1 = icmp sgt i64 %a, %b
662+
%t2 = icmp ne i64 %b, %a
663+
%t3 = zext i1 %t2 to i64
664+
%t4 = select i1 %t1, i64 -1, i64 %t3
665+
ret i64 %t4
666+
; CHECK-LABEL: setb26
667+
; CHECK-DAG: xor
668+
; CHECK-DAG: li
669+
; CHECK-DAG: cmpd
670+
; CHECK-DAG: addic
671+
; CHECK-DAG: subfe
672+
; CHECK: isel
673+
; CHECK: blr
674+
; CHECK-PWR8-LABEL: setb26
675+
; CHECK-PWR8-DAG: cmpd
676+
; CHECK-PWR8-DAG: addic
677+
; CHECK-PWR8-DAG: subfe
678+
; CHECK-PWR8: isel
679+
; CHECK-PWR8: blr
680+
}
681+
682+
; Test with different scalar integer type for selected value
683+
; i32/i16/i8 rather than i64 above
684+
685+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
686+
define i64 @setb27(i64 %a, i64 %b) {
687+
%t1 = icmp slt i64 %a, %b
688+
%t2 = icmp ne i64 %b, %a
689+
%t3 = zext i1 %t2 to i32
690+
%t4 = select i1 %t1, i32 -1, i32 %t3
691+
%t5 = sext i32 %t4 to i64
692+
ret i64 %t5
693+
; CHECK-LABEL: setb27
694+
; CHECK-DAG: xor
695+
; CHECK-DAG: li
696+
; CHECK-DAG: cmpd
697+
; CHECK-DAG: addic
698+
; CHECK-DAG: subfe
699+
; CHECK: isel
700+
; CHECK: extsw
701+
; CHECK: blr
702+
; CHECK-PWR8-LABEL: setb27
703+
; CHECK-PWR8-DAG: cmpd
704+
; CHECK-PWR8-DAG: addic
705+
; CHECK-PWR8-DAG: subfe
706+
; CHECK-PWR8: isel
707+
; CHECK-PWR8: extsw
708+
; CHECK-PWR8: blr
709+
}
710+
711+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
712+
define i64 @setb28(i64 %a, i64 %b) {
713+
%t1 = icmp sgt i64 %b, %a
714+
%t2 = icmp ne i64 %b, %a
715+
%t3 = zext i1 %t2 to i16
716+
%t4 = select i1 %t1, i16 -1, i16 %t3
717+
%t5 = sext i16 %t4 to i64
718+
ret i64 %t5
719+
; CHECK-LABEL: setb28
720+
; CHECK-DAG: xor
721+
; CHECK-DAG: li
722+
; CHECK-DAG: cmpd
723+
; CHECK-DAG: addic
724+
; CHECK-DAG: subfe
725+
; CHECK: isel
726+
; CHECK: extsh
727+
; CHECK: blr
728+
; CHECK-PWR8-LABEL: setb28
729+
; CHECK-PWR8-DAG: cmpd
730+
; CHECK-PWR8-DAG: addic
731+
; CHECK-PWR8-DAG: subfe
732+
; CHECK-PWR8: isel
733+
; CHECK-PWR8: extsh
734+
; CHECK-PWR8: blr
735+
}
736+
737+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
738+
define i64 @setb29(i64 %a, i64 %b) {
739+
%t1 = icmp slt i64 %a, %b
740+
%t2 = icmp sgt i64 %a, %b
741+
%t3 = zext i1 %t2 to i8
742+
%t4 = select i1 %t1, i8 -1, i8 %t3
743+
%t5 = zext i8 %t4 to i64
744+
ret i64 %t5
745+
; CHECK-LABEL: setb29
746+
; CHECK-DAG: sradi
747+
; CHECK-DAG: rldicl
748+
; CHECK-DAG: li
749+
; CHECK-DAG: cmpd
750+
; CHECK-DAG: subfc
751+
; CHECK-DAG: adde
752+
; CHECK-DAG: xori
753+
; CHECK-DAG: isel
754+
; CHECK: blr
755+
; CHECK-PWR8-LABEL: setb29
756+
; CHECK-PWR8-DAG: cmpd
757+
; CHECK-PWR8-DAG: subfc
758+
; CHECK-PWR8-DAG: adde
759+
; CHECK-PWR8: isel
760+
; CHECK-PWR8: blr
761+
}
762+
763+
; Testings to cover different comparison opcodes
764+
; Test with integer type i32/i16/i8 for input parameter
765+
766+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
767+
define i64 @setbsw1(i32 %a, i32 %b) {
768+
%t1 = icmp slt i32 %a, %b
769+
%t2 = icmp ne i32 %a, %b
770+
%t3 = zext i1 %t2 to i64
771+
%t4 = select i1 %t1, i64 -1, i64 %t3
772+
ret i64 %t4
773+
; CHECK-LABEL: setbsw1
774+
; CHECK-DAG: xor
775+
; CHECK-DAG: li
776+
; CHECK-DAG: cmpw
777+
; CHECK-DAG: cntlzw
778+
; CHECK-DAG: srwi
779+
; CHECK-DAG: xori
780+
; CHECK: isel
781+
; CHECK: blr
782+
; CHECK-PWR8-LABEL: setbsw1
783+
; CHECK-PWR8-DAG: cntlzw
784+
; CHECK-PWR8-DAG: cmpw
785+
; CHECK-PWR8-DAG: srwi
786+
; CHECK-PWR8-DAG: xori
787+
; CHECK-PWR8: isel
788+
; CHECK-PWR8: blr
789+
}
790+
791+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
792+
define i64 @setbsw2(i32 %a, i32 %b) {
793+
%t1 = icmp sgt i32 %b, %a
794+
%t2 = icmp ne i32 %a, %b
795+
%t3 = zext i1 %t2 to i64
796+
%t4 = select i1 %t1, i64 -1, i64 %t3
797+
ret i64 %t4
798+
; CHECK-LABEL: setbsw2
799+
; CHECK-DAG: xor
800+
; CHECK-DAG: li
801+
; CHECK-DAG: cmpw
802+
; CHECK-DAG: cntlzw
803+
; CHECK-DAG: srwi
804+
; CHECK-DAG: xori
805+
; CHECK: isel
806+
; CHECK: blr
807+
; CHECK-PWR8-LABEL: setbsw2
808+
; CHECK-PWR8-DAG: cntlzw
809+
; CHECK-PWR8-DAG: cmpw
810+
; CHECK-PWR8-DAG: srwi
811+
; CHECK-PWR8-DAG: xori
812+
; CHECK-PWR8: isel
813+
; CHECK-PWR8: blr
814+
}
815+
816+
; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
817+
define i64 @setbsw3(i32 %a, i32 %b) {
818+
%t1 = icmp eq i32 %a, %b
819+
%t2 = icmp sgt i32 %b, %a
820+
%t3 = select i1 %t2, i64 -1, i64 1
821+
%t4 = select i1 %t1, i64 0, i64 %t3
822+
ret i64 %t4
823+
; CHECK-LABEL: setbsw3
824+
; CHECK-DAG: li
825+
; CHECK-DAG: li
826+
; CHECK-DAG: cmpw
827+
; CHECK: isel
828+
; CHECK: cmplw
829+
; CHECK: isel
830+
; CHECK: blr
831+
; CHECK-PWR8-LABEL: setbsw3
832+
; CHECK-PWR8: cmpw
833+
; CHECK-PWR8: isel
834+
; CHECK-PWR8: cmplw
835+
; CHECK-PWR8: isel
836+
; CHECK-PWR8: blr
837+
}
838+
839+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
840+
define i64 @setbsh1(i16 signext %a, i16 signext %b) {
841+
%t1 = icmp slt i16 %a, %b
842+
%t2 = icmp ne i16 %b, %a
843+
%t3 = zext i1 %t2 to i64
844+
%t4 = select i1 %t1, i64 -1, i64 %t3
845+
ret i64 %t4
846+
; CHECK-LABEL: setbsh1
847+
; CHECK-DAG: xor
848+
; CHECK-DAG: li
849+
; CHECK-DAG: cmpw
850+
; CHECK-DAG: cntlzw
851+
; CHECK-DAG: srwi
852+
; CHECK-DAG: xori
853+
; CHECK: isel
854+
; CHECK: blr
855+
; CHECK-PWR8-LABEL: setbsh1
856+
; CHECK-PWR8-DAG: cntlzw
857+
; CHECK-PWR8-DAG: cmpw
858+
; CHECK-PWR8-DAG: srwi
859+
; CHECK-PWR8-DAG: xori
860+
; CHECK-PWR8: isel
861+
; CHECK-PWR8: blr
862+
}
863+
864+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
865+
define i64 @setbsh2(i16 signext %a, i16 signext %b) {
866+
%t1 = icmp sgt i16 %b, %a
867+
%t2 = icmp ne i16 %b, %a
868+
%t3 = zext i1 %t2 to i64
869+
%t4 = select i1 %t1, i64 -1, i64 %t3
870+
ret i64 %t4
871+
; CHECK-LABEL: setbsh2
872+
; CHECK-DAG: xor
873+
; CHECK-DAG: li
874+
; CHECK-DAG: cmpw
875+
; CHECK-DAG: cntlzw
876+
; CHECK-DAG: srwi
877+
; CHECK-DAG: xori
878+
; CHECK: isel
879+
; CHECK: blr
880+
; CHECK-PWR8-LABEL: setbsh2
881+
; CHECK-PWR8-DAG: cmpw
882+
; CHECK-PWR8-DAG: cntlzw
883+
; CHECK-PWR8-DAG: srwi
884+
; CHECK-PWR8-DAG: xori
885+
; CHECK-PWR8: isel
886+
; CHECK-PWR8: blr
887+
}
888+
889+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
890+
define i64 @setbsc1(i8 %a, i8 %b) {
891+
%t1 = icmp slt i8 %a, %b
892+
%t2 = icmp sgt i8 %a, %b
893+
%t3 = zext i1 %t2 to i64
894+
%t4 = select i1 %t1, i64 -1, i64 %t3
895+
ret i64 %t4
896+
; CHECK-LABEL: setbsc1
897+
; CHECK-DAG: extsb [[RA:r[0-9]+]], r3
898+
; CHECK-DAG: extsb [[RB:r[0-9]+]], r4
899+
; CHECK-DAG: li
900+
; CHECK-DAG: sub
901+
; CHECK-DAG: cmpw {{c?r?(0, )?}}[[RA]], [[RB]]
902+
; CHECK-DAG: rldicl
903+
; CHECK: isel
904+
; CHECK: blr
905+
; CHECK-PWR8-LABEL: setbsc1
906+
; CHECK-PWR8-DAG: extsb
907+
; CHECK-PWR8-DAG: extsb
908+
; CHECK-PWR8-DAG: extsw
909+
; CHECK-PWR8-DAG: extsw
910+
; CHECK-PWR8-DAG: cmpw
911+
; CHECK-PWR8-DAG: rldicl
912+
; CHECK-PWR8: isel
913+
; CHECK-PWR8: blr
914+
}
915+
916+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
917+
define i64 @setbsc2(i8 %a, i8 %b) {
918+
%t1 = icmp sgt i8 %b, %a
919+
%t2 = icmp sgt i8 %a, %b
920+
%t3 = zext i1 %t2 to i64
921+
%t4 = select i1 %t1, i64 -1, i64 %t3
922+
ret i64 %t4
923+
; CHECK-LABEL: setbsc2
924+
; CHECK-DAG: extsb [[RA:r[0-9]+]], r3
925+
; CHECK-DAG: extsb [[RB:r[0-9]+]], r4
926+
; CHECK-DAG: li
927+
; CHECK-DAG: sub
928+
; CHECK-DAG: cmpw
929+
; CHECK-DAG: rldicl
930+
; CHECK: isel
931+
; CHECK: blr
932+
; CHECK-PWR8-LABEL: setbsc2
933+
; CHECK-PWR8-DAG: extsb
934+
; CHECK-PWR8-DAG: extsb
935+
; CHECK-PWR8-DAG: extsw
936+
; CHECK-PWR8-DAG: extsw
937+
; CHECK-PWR8-DAG: cmpw
938+
; CHECK-PWR8-DAG: rldicl
939+
; CHECK-PWR8: isel
940+
; CHECK-PWR8: blr
941+
}
942+
943+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
944+
define i64 @setbsc3(i4 %a, i4 %b) {
945+
%t1 = icmp slt i4 %a, %b
946+
%t2 = icmp slt i4 %b, %a
947+
%t3 = zext i1 %t2 to i64
948+
%t4 = select i1 %t1, i64 -1, i64 %t3
949+
ret i64 %t4
950+
; CHECK-LABEL: setbsc3
951+
; CHECK-DAG: slwi [[RA:r[0-9]+]], r3, 28
952+
; CHECK-DAG: slwi [[RB:r[0-9]+]], r4, 28
953+
; CHECK-DAG: li
954+
; CHECK-DAG: srawi [[RA1:r[0-9]+]], [[RA]], 28
955+
; CHECK-DAG: srawi [[RB1:r[0-9]+]], [[RB]], 28
956+
; CHECK-DAG: sub
957+
; CHECK-DAG: cmpw
958+
; CHECK-DAG: rldicl
959+
; CHECK: isel
960+
; CHECK: blr
961+
; CHECK-PWR8-LABEL: setbsc3
962+
; CHECK-PWR8-DAG: slwi
963+
; CHECK-PWR8-DAG: slwi
964+
; CHECK-PWR8-DAG: srawi
965+
; CHECK-PWR8-DAG: srawi
966+
; CHECK-PWR8-DAG: extsw
967+
; CHECK-PWR8-DAG: extsw
968+
; CHECK-PWR8-DAG: cmpw
969+
; CHECK-PWR8-DAG: rldicl
970+
; CHECK-PWR8: isel
971+
; CHECK-PWR8: blr
972+
}
973+
974+
; Test with unsigned integer type i64/i32/i16/i8 for input parameter
975+
976+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setult)), setugt
977+
define i64 @setbud1(i64 %a, i64 %b) {
978+
%t1 = icmp ugt i64 %b, %a
979+
%t2 = icmp ult i64 %b, %a
980+
%t3 = zext i1 %t2 to i64
981+
%t4 = select i1 %t1, i64 -1, i64 %t3
982+
ret i64 %t4
983+
; CHECK-LABEL: setbud1
984+
; CHECK-DAG: li
985+
; CHECK-DAG: cmpld
986+
; CHECK-DAG: subfc
987+
; CHECK-DAG: subfe
988+
; CHECK-DAG: neg
989+
; CHECK: isel
990+
; CHECK: blr
991+
; CHECK-PWR8-LABEL: setbud1
992+
; CHECK-PWR8-DAG: subfc
993+
; CHECK-PWR8-DAG: subfe
994+
; CHECK-PWR8-DAG: cmpld
995+
; CHECK-PWR8-DAG: neg
996+
; CHECK-PWR8: isel
997+
; CHECK-PWR8: blr
998+
}
999+
1000+
; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setugt
1001+
define i64 @setbud2(i64 %a, i64 %b) {
1002+
%t1 = icmp ugt i64 %a, %b
1003+
%t2 = icmp ne i64 %a, %b
1004+
%t3 = sext i1 %t2 to i64
1005+
%t4 = select i1 %t1, i64 1, i64 %t3
1006+
ret i64 %t4
1007+
; CHECK-LABEL: setbud2
1008+
; CHECK-DAG: xor
1009+
; CHECK-DAG: li
1010+
; CHECK: cmpld
1011+
; CHECK-DAG: subfic
1012+
; CHECK-DAG: subfe
1013+
; CHECK: isel
1014+
; CHECK: blr
1015+
; CHECK-PWR8-LABEL: setbud2
1016+
; CHECK-PWR8-DAG: cmpld
1017+
; CHECK-PWR8-DAG: subfic
1018+
; CHECK-PWR8-DAG: subfe
1019+
; CHECK-PWR8: isel
1020+
; CHECK-PWR8: blr
1021+
}
1022+
1023+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setugt), seteq
1024+
define i64 @setbud3(i64 %a, i64 %b) {
1025+
%t1 = icmp eq i64 %b, %a
1026+
%t2 = icmp ugt i64 %b, %a
1027+
%t3 = select i1 %t2, i64 -1, i64 1
1028+
%t4 = select i1 %t1, i64 0, i64 %t3
1029+
ret i64 %t4
1030+
; CHECK-LABEL: setbud3
1031+
; CHECK-DAG: li
1032+
; CHECK: cmpld
1033+
; CHECK-DAG: li
1034+
; CHECK: isel
1035+
; CHECK: isel
1036+
; CHECK: blr
1037+
; CHECK-PWR8-LABEL: setbud3
1038+
; CHECK-PWR8-DAG: cmpld
1039+
; CHECK-PWR8-DAG: li
1040+
; CHECK-PWR8-DAG: li
1041+
; CHECK-PWR8: isel
1042+
; CHECK-PWR8: isel
1043+
; CHECK-PWR8: blr
1044+
}
1045+
1046+
; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setult
1047+
define i64 @setbuw1(i32 %a, i32 %b) {
1048+
%t1 = icmp ult i32 %b, %a
1049+
%t2 = icmp ne i32 %a, %b
1050+
%t3 = sext i1 %t2 to i64
1051+
%t4 = select i1 %t1, i64 1, i64 %t3
1052+
ret i64 %t4
1053+
; CHECK-LABEL: setbuw1
1054+
; CHECK-DAG: xor
1055+
; CHECK-DAG: li
1056+
; CHECK-DAG: cmplw
1057+
; CHECK-DAG: cntlzw
1058+
; CHECK-DAG: srwi
1059+
; CHECK-DAG: xori
1060+
; CHECK-DAG: neg
1061+
; CHECK: isel
1062+
; CHECK: blr
1063+
; CHECK-PWR8-LABEL: setbuw1
1064+
; CHECK-PWR8-DAG: cntlzw
1065+
; CHECK-PWR8-DAG: cmplw
1066+
; CHECK-PWR8-DAG: srwi
1067+
; CHECK-PWR8-DAG: xori
1068+
; CHECK-PWR8-DAG: neg
1069+
; CHECK-PWR8: isel
1070+
; CHECK-PWR8: blr
1071+
}
1072+
1073+
; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setugt
1074+
define i64 @setbuw2(i32 %a, i32 %b) {
1075+
%t1 = icmp ugt i32 %a, %b
1076+
%t2 = icmp ne i32 %b, %a
1077+
%t3 = sext i1 %t2 to i64
1078+
%t4 = select i1 %t1, i64 1, i64 %t3
1079+
ret i64 %t4
1080+
; CHECK-LABEL: setbuw2
1081+
; CHECK-DAG: xor
1082+
; CHECK-DAG: li
1083+
; CHECK-DAG: cmplw
1084+
; CHECK-DAG: cntlzw
1085+
; CHECK-DAG: srwi
1086+
; CHECK-DAG: xori
1087+
; CHECK-DAG: neg
1088+
; CHECK: isel
1089+
; CHECK: blr
1090+
; CHECK-PWR8-LABEL: setbuw2
1091+
; CHECK-PWR8-DAG: cntlzw
1092+
; CHECK-PWR8-DAG: cmplw
1093+
; CHECK-PWR8-DAG: srwi
1094+
; CHECK-PWR8-DAG: xori
1095+
; CHECK-PWR8-DAG: neg
1096+
; CHECK-PWR8: isel
1097+
; CHECK-PWR8: blr
1098+
}
1099+
1100+
; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setult
1101+
define i64 @setbuh(i16 %a, i16 %b) {
1102+
%t1 = icmp ult i16 %b, %a
1103+
%t2 = icmp ne i16 %b, %a
1104+
%t3 = sext i1 %t2 to i64
1105+
%t4 = select i1 %t1, i64 1, i64 %t3
1106+
ret i64 %t4
1107+
; CHECK-LABEL: setbuh
1108+
; CHECK-DAG: rlwinm [[RA:r[0-9]+]], r3, 0, 16, 31
1109+
; CHECK-DAG: rlwinm [[RB:r[0-9]+]], r4, 0, 16, 31
1110+
; CHECK-DAG: li
1111+
; CHECK-DAG: xor
1112+
; CHECK-DAG: cmplw
1113+
; CHECK-DAG: cntlzw
1114+
; CHECK-DAG: srwi
1115+
; CHECK-DAG: xori
1116+
; CHECK-DAG: neg
1117+
; CHECK: isel
1118+
; CHECK: blr
1119+
; CHECK-PWR8-LABEL: setbuh
1120+
; CHECK-PWR8: rlwinm
1121+
; CHECK-PWR8: rlwinm
1122+
; CHECK-PWR8-DAG: cmplw
1123+
; CHECK-PWR8-DAG: cntlzw
1124+
; CHECK-PWR8: srwi
1125+
; CHECK-PWR8: xori
1126+
; CHECK-PWR8: neg
1127+
; CHECK-PWR8: isel
1128+
; CHECK-PWR8: blr
1129+
}
1130+
1131+
; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setult)), setugt
1132+
define i64 @setbuc(i8 %a, i8 %b) {
1133+
%t1 = icmp ugt i8 %a, %b
1134+
%t2 = icmp ult i8 %a, %b
1135+
%t3 = sext i1 %t2 to i64
1136+
%t4 = select i1 %t1, i64 1, i64 %t3
1137+
ret i64 %t4
1138+
; CHECK-LABEL: setbuc
1139+
; CHECK-DAG: rlwinm [[RA:r[0-9]+]], r3, 0, 24, 31
1140+
; CHECK-DAG: rlwinm [[RB:r[0-9]+]], r4, 0, 24, 31
1141+
; CHECK-DAG: li
1142+
; CHECK-DAG: clrldi
1143+
; CHECK-DAG: clrldi
1144+
; CHECK-DAG: cmplw
1145+
; CHECK-DAG: sub
1146+
; CHECK-DAG: sradi
1147+
; CHECK: isel
1148+
; CHECK: blr
1149+
; CHECK-PWR8-LABEL: setbuc
1150+
; CHECK-PWR8: rlwinm
1151+
; CHECK-PWR8: rlwinm
1152+
; CHECK-PWR8-DAG: clrldi
1153+
; CHECK-PWR8-DAG: clrldi
1154+
; CHECK-PWR8-DAG: cmplw
1155+
; CHECK-PWR8: sradi
1156+
; CHECK-PWR8: isel
1157+
; CHECK-PWR8: blr
1158+
}
1159+
1160+
; Test with float/double/float128 for input parameter
1161+
1162+
; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
1163+
define i64 @setbf1(float %a, float %b) {
1164+
%t1 = fcmp fast olt float %a, %b
1165+
%t2 = fcmp fast olt float %b, %a
1166+
%t3 = zext i1 %t2 to i64
1167+
%t4 = select i1 %t1, i64 -1, i64 %t3
1168+
ret i64 %t4
1169+
; CHECK-LABEL: setbf1
1170+
; CHECK: fcmpu
1171+
; CHECK-DAG: li
1172+
; CHECK-DAG: li
1173+
; CHECK-DAG: fcmpu
1174+
; CHECK: isel
1175+
; CHECK: li
1176+
; CHECK: isel
1177+
; CHECK: blr
1178+
; CHECK-PWR8-LABEL: setbf1
1179+
; CHECK-PWR8: isel
1180+
; CHECK-PWR8: isel
1181+
; CHECK-PWR8: blr
1182+
}
1183+
1184+
; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
1185+
define i64 @setbf2(float %a, float %b) {
1186+
%t1 = fcmp fast ogt float %b, %a
1187+
%t2 = fcmp fast olt float %b, %a
1188+
%t3 = zext i1 %t2 to i64
1189+
%t4 = select i1 %t1, i64 -1, i64 %t3
1190+
ret i64 %t4
1191+
; CHECK-LABEL: setbf2
1192+
; CHECK-DAG: li
1193+
; CHECK-DAG: li
1194+
; CHECK-DAG: fcmpu
1195+
; CHECK-DAG: isel
1196+
; CHECK-DAG: li
1197+
; CHECK: isel
1198+
; CHECK: blr
1199+
; CHECK-PWR8-LABEL: setbf2
1200+
; CHECK-PWR8: isel
1201+
; CHECK-PWR8: isel
1202+
; CHECK-PWR8: blr
1203+
}
1204+
1205+
; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
1206+
define i64 @setbdf1(double %a, double %b) {
1207+
%t1 = fcmp fast oeq double %b, %a
1208+
%t2 = fcmp fast ogt double %b, %a
1209+
%t3 = select i1 %t2, i64 -1, i64 1
1210+
%t4 = select i1 %t1, i64 0, i64 %t3
1211+
ret i64 %t4
1212+
; CHECK-LABEL: setbdf1
1213+
; CHECK-DAG: xscmpudp
1214+
; CHECK-DAG: li
1215+
; CHECK-DAG: li
1216+
; CHECK: isel
1217+
; CHECK: isel
1218+
; CHECK: blr
1219+
; CHECK-PWR8-LABEL: setbdf1
1220+
; CHECK-PWR8: isel
1221+
; CHECK-PWR8: isel
1222+
; CHECK-PWR8: blr
1223+
}
1224+
1225+
; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
1226+
define i64 @setbdf2(double %a, double %b) {
1227+
%t1 = fcmp fast olt double %b, %a
1228+
%t2 = fcmp fast ogt double %b, %a
1229+
%t3 = sext i1 %t2 to i64
1230+
%t4 = select i1 %t1, i64 1, i64 %t3
1231+
ret i64 %t4
1232+
; CHECK-LABEL: setbdf2
1233+
; CHECK-DAG: fcmpu
1234+
; CHECK-DAG: li
1235+
; CHECK-DAG: li
1236+
; CHECK-DAG: xscmpudp
1237+
; CHECK-DAG: isel
1238+
; CHECK-DAG: li
1239+
; CHECK: isel
1240+
; CHECK: blr
1241+
; CHECK-PWR8-LABEL: setbdf2
1242+
; CHECK-PWR8: isel
1243+
; CHECK-PWR8: isel
1244+
; CHECK-PWR8: blr
1245+
}
1246+
1247+
define i64 @setbf128(fp128 %a, fp128 %b) {
1248+
%t1 = fcmp fast ogt fp128 %a, %b
1249+
%t2 = fcmp fast olt fp128 %a, %b
1250+
%t3 = sext i1 %t2 to i64
1251+
%t4 = select i1 %t1, i64 1, i64 %t3
1252+
ret i64 %t4
1253+
; CHECK-LABEL: setbf128
1254+
; CHECK-DAG: li
1255+
; CHECK-DAG: li
1256+
; CHECK-DAG: xscmpuqp
1257+
; CHECK-DAG: isel
1258+
; CHECK-DAG: li
1259+
; CHECK: isel
1260+
; CHECK: blr
1261+
; CHECK-PWR8-LABEL: setbf128
1262+
; CHECK-PWR8: isel
1263+
; CHECK-PWR8: blr
1264+
}
1265+
1266+
; Some cases we can't leverage setb
1267+
1268+
define i64 @setbn1(i64 %a, i64 %b) {
1269+
%t1 = icmp slt i64 %a, %b
1270+
%t2 = icmp eq i64 %a, %b
1271+
%t3 = zext i1 %t2 to i64
1272+
%t4 = select i1 %t1, i64 -1, i64 %t3
1273+
ret i64 %t4
1274+
; CHECK-LABEL: setbn1
1275+
; CHECK-NOT: {{\<setb\>}}
1276+
; CHECK: isel
1277+
; CHECK: blr
1278+
}
1279+
1280+
define i64 @setbn2(double %a, double %b) {
1281+
%t1 = fcmp olt double %a, %b
1282+
%t2 = fcmp one double %a, %b
1283+
%t3 = zext i1 %t2 to i64
1284+
%t4 = select i1 %t1, i64 -1, i64 %t3
1285+
ret i64 %t4
1286+
; CHECK-LABEL: setbn2
1287+
; CHECK-NOT: {{\<setb\>}}
1288+
; CHECK: isel
1289+
; CHECK: blr
1290+
}
1291+
1292+
define i64 @setbn3(float %a, float %b) {
1293+
%t1 = fcmp ult float %a, %b
1294+
%t2 = fcmp une float %a, %b
1295+
%t3 = zext i1 %t2 to i64
1296+
%t4 = select i1 %t1, i64 -1, i64 %t3
1297+
ret i64 %t4
1298+
; CHECK-LABEL: setbn3
1299+
; CHECK-NOT: {{\<setb\>}}
1300+
; CHECK: isel
1301+
; CHECK: blr
1302+
}

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