[mips] Mark fmaxl as a long double emulation routine

Failure was discovered upon running projects/compiler-rt/test/builtins/Unit/divtc3_test.c in a stage2 compiler build. When compiling projects/compiler-rt/lib/builtins/divtc3.c, a call to fmaxl within the divtc3 implementation had its return values read from registers $2 and $3 instead of $f0 and $f2. Include fmaxl in the list of long double emulation routines to have its return value correctly interpreted as f128. Almost exact issue here: https://reviews.llvm.org/D17760 Differential Revision: https://reviews.llvm.org/D52649 llvm-svn: 344326
llvm · Oct 12, 2018 · 285c0f4 · 285c0f4
1 parent eddf6b5
commit 285c0f4
Showing 2 changed files with 29 additions and 4 deletions.
diff --git a/llvm/lib/Target/Mips/MipsCCState.cpp b/llvm/lib/Target/Mips/MipsCCState.cpp
@@ -24,10 +24,10 @@ static bool isF128SoftLibCall(const char *CallSym) {
       "__lttf2",       "__multf3",     "__netf2",       "__powitf2",
       "__subtf3",      "__trunctfdf2", "__trunctfsf2",  "__unordtf2",
       "ceill",         "copysignl",    "cosl",          "exp2l",
-      "expl",          "floorl",       "fmal",          "fmodl",
-      "log10l",        "log2l",        "logl",          "nearbyintl",
-      "powl",          "rintl",        "roundl",        "sinl",
-      "sqrtl",         "truncl"};
+      "expl",          "floorl",       "fmal",          "fmaxl",
+      "fmodl",         "log10l",       "log2l",         "logl",
+      "nearbyintl",    "powl",         "rintl",         "roundl",
+      "sinl",          "sqrtl",        "truncl"};
 
   // Check that LibCalls is sorted alphabetically.
   auto Comp = [](const char *S1, const char *S2) { return strcmp(S1, S2) < 0; };

diff --git a/llvm/test/CodeGen/Mips/cconv/fmaxl_call.ll b/llvm/test/CodeGen/Mips/cconv/fmaxl_call.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64 < %s | FileCheck %s
+
+define fp128 @call_fmaxl(fp128 %a, fp128 %b) {
+; CHECK-LABEL: call_fmaxl:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    daddiu $sp, $sp, -16
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; CHECK-NEXT:    .cfi_offset 31, -8
+; CHECK-NEXT:    jal fmaxl
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mov.d $f12, $f0
+; CHECK-NEXT:    jal f
+; CHECK-NEXT:    mov.d $f13, $f2
+; CHECK-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; CHECK-NEXT:    jr $ra
+; CHECK-NEXT:    daddiu $sp, $sp, 16
+    %1 = call fp128 @llvm.maxnum.f128(fp128 %a, fp128 %b)
+    %2 = call fp128 @f(fp128 %1)
+    ret fp128 %2
+}
+
+declare fp128 @llvm.maxnum.f128(fp128, fp128)
+declare fp128 @f(fp128)