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committedSep 21, 2018
[x86] add (negative) andnp test for D52318; NFC
llvm-svn: 342756
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‎llvm/test/CodeGen/X86/avx-logic.ll

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@@ -364,6 +364,28 @@ define <8 x i32> @andn_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %
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ret <8 x i32> %add1
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}
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define <8 x i32> @andn_variable_mask_operand(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) {
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; AVX1-LABEL: andn_variable_mask_operand:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vandnps %ymm2, %ymm0, %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; INT256-LABEL: andn_variable_mask_operand:
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; INT256: # %bb.0:
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; INT256-NEXT: vpandn %ymm2, %ymm0, %ymm0
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; INT256-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; INT256-NEXT: retq
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%and = and <8 x i32> %x, %z
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%xor = xor <8 x i32> %and, %z ; demanded bits will make this a 'not'
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%add = add <8 x i32> %xor, %y
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ret <8 x i32> %add
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}
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define <8 x i32> @or_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) {
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; AVX1-LABEL: or_disguised_i8_elts:
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; AVX1: # %bb.0:

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