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topperctopperc
committedAug 16, 2018
[DAGCombiner] Don't reassociate operations that have the vector reduction flag set.
When nodes are reassociated the vector-reduction flag gets lost. The test case is here is what would happen if you had a sum of absolute differences loop that started with a non-zero but contant sum and that loop was unrolled. The vectorizer will generate a constant vector for the initial value. And DAGCombiner reassociate tries to move it down the addition tree erasing the vector-reduction flag. Interestingly this moves constants the opposite direction of the reassociate IR pass. I've chosen to just punt on the reassociate, but I suppose we could maybe preserve the flag if both nodes have it set. Differential Revision: https://reviews.llvm.org/D50827 llvm-svn: 339946
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+37
-166
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2 files changed

+37
-166
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‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

+13-9
Original file line numberDiff line numberDiff line change
@@ -393,7 +393,7 @@ namespace {
393393

394394
SDValue XformToShuffleWithZero(SDNode *N);
395395
SDValue ReassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
396-
SDValue N1);
396+
SDValue N1, SDNodeFlags Flags);
397397

398398
SDValue visitShiftByConstant(SDNode *N, ConstantSDNode *Amt);
399399

@@ -942,9 +942,13 @@ static bool isAnyConstantBuildVector(const SDNode *N) {
942942
}
943943

944944
SDValue DAGCombiner::ReassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
945-
SDValue N1) {
945+
SDValue N1, SDNodeFlags Flags) {
946+
// Don't reassociate reductions.
947+
if (Flags.hasVectorReduction())
948+
return SDValue();
949+
946950
EVT VT = N0.getValueType();
947-
if (N0.getOpcode() == Opc) {
951+
if (N0.getOpcode() == Opc && !N0->getFlags().hasVectorReduction()) {
948952
if (SDNode *L = DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1))) {
949953
if (SDNode *R = DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
950954
// reassoc. (op (op x, c1), c2) -> (op x, (op c1, c2))
@@ -964,7 +968,7 @@ SDValue DAGCombiner::ReassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
964968
}
965969
}
966970

967-
if (N1.getOpcode() == Opc) {
971+
if (N1.getOpcode() == Opc && !N1->getFlags().hasVectorReduction()) {
968972
if (SDNode *R = DAG.isConstantIntBuildVectorOrConstantInt(N1.getOperand(1))) {
969973
if (SDNode *L = DAG.isConstantIntBuildVectorOrConstantInt(N0)) {
970974
// reassoc. (op c2, (op x, c1)) -> (op x, (op c1, c2))
@@ -2110,7 +2114,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
21102114
return NewSel;
21112115

21122116
// reassociate add
2113-
if (SDValue RADD = ReassociateOps(ISD::ADD, DL, N0, N1))
2117+
if (SDValue RADD = ReassociateOps(ISD::ADD, DL, N0, N1, N->getFlags()))
21142118
return RADD;
21152119

21162120
// fold ((0-A) + B) -> B-A
@@ -2974,7 +2978,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
29742978
N0.getOperand(1), N1));
29752979

29762980
// reassociate mul
2977-
if (SDValue RMUL = ReassociateOps(ISD::MUL, SDLoc(N), N0, N1))
2981+
if (SDValue RMUL = ReassociateOps(ISD::MUL, SDLoc(N), N0, N1, N->getFlags()))
29782982
return RMUL;
29792983

29802984
return SDValue();
@@ -4429,7 +4433,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
44294433
return NewSel;
44304434

44314435
// reassociate and
4432-
if (SDValue RAND = ReassociateOps(ISD::AND, SDLoc(N), N0, N1))
4436+
if (SDValue RAND = ReassociateOps(ISD::AND, SDLoc(N), N0, N1, N->getFlags()))
44334437
return RAND;
44344438

44354439
// Try to convert a constant mask AND into a shuffle clear mask.
@@ -5139,7 +5143,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
51395143
return BSwap;
51405144

51415145
// reassociate or
5142-
if (SDValue ROR = ReassociateOps(ISD::OR, SDLoc(N), N0, N1))
5146+
if (SDValue ROR = ReassociateOps(ISD::OR, SDLoc(N), N0, N1, N->getFlags()))
51435147
return ROR;
51445148

51455149
// Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
@@ -6016,7 +6020,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
60166020
return NewSel;
60176021

60186022
// reassociate xor
6019-
if (SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1))
6023+
if (SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1, N->getFlags()))
60206024
return RXOR;
60216025

60226026
// fold !(x cc y) -> (x !cc y)

‎llvm/test/CodeGen/X86/sad.ll

+24-157
Original file line numberDiff line numberDiff line change
@@ -1401,148 +1401,33 @@ define i32 @sad_nonloop_32i8(<32 x i8>* nocapture readonly %p, i64, <32 x i8>* n
14011401
define i32 @sad_unroll_nonzero_initial(<16 x i8>* %arg, <16 x i8>* %arg1, <16 x i8>* %arg2, <16 x i8>* %arg3) {
14021402
; SSE2-LABEL: sad_unroll_nonzero_initial:
14031403
; SSE2: # %bb.0: # %bb
1404-
; SSE2-NEXT: movdqu (%rdi), %xmm2
1405-
; SSE2-NEXT: movdqu (%rsi), %xmm0
1406-
; SSE2-NEXT: pxor %xmm11, %xmm11
1407-
; SSE2-NEXT: movdqa %xmm2, %xmm12
1408-
; SSE2-NEXT: punpcklbw {{.*#+}} xmm12 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3],xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
1409-
; SSE2-NEXT: movdqa %xmm12, %xmm9
1410-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1],xmm9[2],xmm11[2],xmm9[3],xmm11[3]
1411-
; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm11[8],xmm2[9],xmm11[9],xmm2[10],xmm11[10],xmm2[11],xmm11[11],xmm2[12],xmm11[12],xmm2[13],xmm11[13],xmm2[14],xmm11[14],xmm2[15],xmm11[15]
1412-
; SSE2-NEXT: movdqa %xmm2, %xmm10
1413-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm11[0],xmm10[1],xmm11[1],xmm10[2],xmm11[2],xmm10[3],xmm11[3]
1414-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm12 = xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
1415-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm11[4],xmm2[5],xmm11[5],xmm2[6],xmm11[6],xmm2[7],xmm11[7]
1416-
; SSE2-NEXT: movdqa %xmm0, %xmm5
1417-
; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3],xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7]
1418-
; SSE2-NEXT: movdqa %xmm5, %xmm6
1419-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm11[0],xmm6[1],xmm11[1],xmm6[2],xmm11[2],xmm6[3],xmm11[3]
1420-
; SSE2-NEXT: psubd %xmm6, %xmm9
1421-
; SSE2-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm11[8],xmm0[9],xmm11[9],xmm0[10],xmm11[10],xmm0[11],xmm11[11],xmm0[12],xmm11[12],xmm0[13],xmm11[13],xmm0[14],xmm11[14],xmm0[15],xmm11[15]
1422-
; SSE2-NEXT: movdqa %xmm0, %xmm6
1423-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm11[0],xmm6[1],xmm11[1],xmm6[2],xmm11[2],xmm6[3],xmm11[3]
1424-
; SSE2-NEXT: psubd %xmm6, %xmm10
1425-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7]
1426-
; SSE2-NEXT: psubd %xmm5, %xmm12
1427-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm11[4],xmm0[5],xmm11[5],xmm0[6],xmm11[6],xmm0[7],xmm11[7]
1428-
; SSE2-NEXT: psubd %xmm0, %xmm2
1429-
; SSE2-NEXT: movdqa %xmm9, %xmm0
1430-
; SSE2-NEXT: psrad $31, %xmm0
1431-
; SSE2-NEXT: paddd %xmm0, %xmm9
1432-
; SSE2-NEXT: pxor %xmm0, %xmm9
1433-
; SSE2-NEXT: movdqa %xmm10, %xmm0
1434-
; SSE2-NEXT: psrad $31, %xmm0
1435-
; SSE2-NEXT: paddd %xmm0, %xmm10
1436-
; SSE2-NEXT: pxor %xmm0, %xmm10
1437-
; SSE2-NEXT: movdqa %xmm12, %xmm0
1438-
; SSE2-NEXT: psrad $31, %xmm0
1439-
; SSE2-NEXT: paddd %xmm0, %xmm12
1440-
; SSE2-NEXT: pxor %xmm0, %xmm12
1441-
; SSE2-NEXT: movdqa %xmm2, %xmm0
1442-
; SSE2-NEXT: psrad $31, %xmm0
1443-
; SSE2-NEXT: paddd %xmm0, %xmm2
1444-
; SSE2-NEXT: pxor %xmm0, %xmm2
1404+
; SSE2-NEXT: movdqu (%rdi), %xmm0
1405+
; SSE2-NEXT: movdqu (%rsi), %xmm1
1406+
; SSE2-NEXT: psadbw %xmm0, %xmm1
14451407
; SSE2-NEXT: movl $1, %eax
1446-
; SSE2-NEXT: movd %eax, %xmm8
1447-
; SSE2-NEXT: movdqu (%rdx), %xmm5
1448-
; SSE2-NEXT: movdqu (%rcx), %xmm3
1449-
; SSE2-NEXT: movdqa %xmm5, %xmm6
1450-
; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm11[8],xmm6[9],xmm11[9],xmm6[10],xmm11[10],xmm6[11],xmm11[11],xmm6[12],xmm11[12],xmm6[13],xmm11[13],xmm6[14],xmm11[14],xmm6[15],xmm11[15]
1451-
; SSE2-NEXT: movdqa %xmm6, %xmm0
1452-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm11[4],xmm0[5],xmm11[5],xmm0[6],xmm11[6],xmm0[7],xmm11[7]
1453-
; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3],xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7]
1454-
; SSE2-NEXT: movdqa %xmm5, %xmm7
1455-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm11[4],xmm7[5],xmm11[5],xmm7[6],xmm11[6],xmm7[7],xmm11[7]
1456-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm11[0],xmm6[1],xmm11[1],xmm6[2],xmm11[2],xmm6[3],xmm11[3]
1457-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3]
1458-
; SSE2-NEXT: movdqa %xmm3, %xmm4
1459-
; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm11[8],xmm4[9],xmm11[9],xmm4[10],xmm11[10],xmm4[11],xmm11[11],xmm4[12],xmm11[12],xmm4[13],xmm11[13],xmm4[14],xmm11[14],xmm4[15],xmm11[15]
1460-
; SSE2-NEXT: movdqa %xmm4, %xmm1
1461-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm11[4],xmm1[5],xmm11[5],xmm1[6],xmm11[6],xmm1[7],xmm11[7]
1462-
; SSE2-NEXT: psubd %xmm1, %xmm0
1463-
; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm11[0],xmm3[1],xmm11[1],xmm3[2],xmm11[2],xmm3[3],xmm11[3],xmm3[4],xmm11[4],xmm3[5],xmm11[5],xmm3[6],xmm11[6],xmm3[7],xmm11[7]
1464-
; SSE2-NEXT: movdqa %xmm3, %xmm1
1465-
; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm11[4],xmm1[5],xmm11[5],xmm1[6],xmm11[6],xmm1[7],xmm11[7]
1466-
; SSE2-NEXT: psubd %xmm1, %xmm7
1467-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3]
1468-
; SSE2-NEXT: psubd %xmm4, %xmm6
1469-
; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm11[0],xmm3[1],xmm11[1],xmm3[2],xmm11[2],xmm3[3],xmm11[3]
1470-
; SSE2-NEXT: psubd %xmm3, %xmm5
1471-
; SSE2-NEXT: movdqa %xmm0, %xmm1
1472-
; SSE2-NEXT: psrad $31, %xmm1
1408+
; SSE2-NEXT: movd %eax, %xmm0
14731409
; SSE2-NEXT: paddd %xmm1, %xmm0
1474-
; SSE2-NEXT: pxor %xmm1, %xmm0
1410+
; SSE2-NEXT: movdqu (%rdx), %xmm1
1411+
; SSE2-NEXT: movdqu (%rcx), %xmm2
1412+
; SSE2-NEXT: psadbw %xmm1, %xmm2
1413+
; SSE2-NEXT: paddd %xmm0, %xmm2
1414+
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
14751415
; SSE2-NEXT: paddd %xmm2, %xmm0
1476-
; SSE2-NEXT: paddd %xmm12, %xmm0
1477-
; SSE2-NEXT: movdqa %xmm7, %xmm1
1478-
; SSE2-NEXT: psrad $31, %xmm1
1479-
; SSE2-NEXT: paddd %xmm1, %xmm7
1480-
; SSE2-NEXT: pxor %xmm1, %xmm7
1481-
; SSE2-NEXT: paddd %xmm0, %xmm7
1482-
; SSE2-NEXT: movdqa %xmm6, %xmm0
1483-
; SSE2-NEXT: psrad $31, %xmm0
1484-
; SSE2-NEXT: paddd %xmm0, %xmm6
1485-
; SSE2-NEXT: pxor %xmm0, %xmm6
1486-
; SSE2-NEXT: paddd %xmm10, %xmm6
1487-
; SSE2-NEXT: paddd %xmm9, %xmm6
1488-
; SSE2-NEXT: paddd %xmm7, %xmm6
1489-
; SSE2-NEXT: paddd %xmm8, %xmm6
1490-
; SSE2-NEXT: movdqa %xmm5, %xmm0
1491-
; SSE2-NEXT: psrad $31, %xmm0
1492-
; SSE2-NEXT: paddd %xmm0, %xmm5
1493-
; SSE2-NEXT: pxor %xmm0, %xmm5
1494-
; SSE2-NEXT: paddd %xmm6, %xmm5
1495-
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm5[2,3,0,1]
1496-
; SSE2-NEXT: paddd %xmm5, %xmm0
14971416
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
14981417
; SSE2-NEXT: paddd %xmm0, %xmm1
14991418
; SSE2-NEXT: movd %xmm1, %eax
15001419
; SSE2-NEXT: retq
15011420
;
15021421
; AVX1-LABEL: sad_unroll_nonzero_initial:
15031422
; AVX1: # %bb.0: # %bb
1504-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1505-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1506-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm2 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1507-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm3 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1508-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1509-
; AVX1-NEXT: vpsubd %xmm4, %xmm0, %xmm0
1510-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1511-
; AVX1-NEXT: vpsubd %xmm4, %xmm1, %xmm1
1512-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1513-
; AVX1-NEXT: vpsubd %xmm4, %xmm2, %xmm2
1514-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1515-
; AVX1-NEXT: vpsubd %xmm4, %xmm3, %xmm3
1516-
; AVX1-NEXT: vpabsd %xmm0, %xmm8
1517-
; AVX1-NEXT: vpabsd %xmm1, %xmm1
1518-
; AVX1-NEXT: vpabsd %xmm2, %xmm2
1519-
; AVX1-NEXT: vpabsd %xmm3, %xmm3
1520-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1521-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm5 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1522-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm6 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1523-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm7 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1524-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1525-
; AVX1-NEXT: vpsubd %xmm0, %xmm4, %xmm0
1526-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1527-
; AVX1-NEXT: vpsubd %xmm4, %xmm5, %xmm4
1528-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm5 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1529-
; AVX1-NEXT: vpsubd %xmm5, %xmm6, %xmm5
1530-
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm6 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
1531-
; AVX1-NEXT: vpsubd %xmm6, %xmm7, %xmm6
1532-
; AVX1-NEXT: vpabsd %xmm0, %xmm0
1533-
; AVX1-NEXT: vpaddd %xmm3, %xmm0, %xmm0
1534-
; AVX1-NEXT: vpaddd %xmm0, %xmm2, %xmm0
1535-
; AVX1-NEXT: vpabsd %xmm4, %xmm2
1536-
; AVX1-NEXT: vpaddd %xmm0, %xmm2, %xmm0
1537-
; AVX1-NEXT: vpabsd %xmm5, %xmm2
1538-
; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm1
1539-
; AVX1-NEXT: vpaddd %xmm1, %xmm8, %xmm1
1540-
; AVX1-NEXT: vpabsd %xmm6, %xmm2
1423+
; AVX1-NEXT: vmovdqu (%rdi), %xmm0
1424+
; AVX1-NEXT: vpsadbw (%rsi), %xmm0, %xmm0
1425+
; AVX1-NEXT: vmovdqu (%rdx), %xmm1
1426+
; AVX1-NEXT: vpsadbw (%rcx), %xmm1, %xmm1
15411427
; AVX1-NEXT: movl $1, %eax
1542-
; AVX1-NEXT: vmovd %eax, %xmm3
1543-
; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1
1428+
; AVX1-NEXT: vmovd %eax, %xmm2
1429+
; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0
15441430
; AVX1-NEXT: vpaddd %xmm0, %xmm1, %xmm0
1545-
; AVX1-NEXT: vpaddd %xmm0, %xmm2, %xmm0
15461431
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
15471432
; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0
15481433
; AVX1-NEXT: vphaddd %xmm0, %xmm0, %xmm0
@@ -1551,27 +1436,13 @@ define i32 @sad_unroll_nonzero_initial(<16 x i8>* %arg, <16 x i8>* %arg1, <16 x
15511436
;
15521437
; AVX2-LABEL: sad_unroll_nonzero_initial:
15531438
; AVX2: # %bb.0: # %bb
1554-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1555-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1556-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm2 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1557-
; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0
1558-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm2 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1559-
; AVX2-NEXT: vpsubd %ymm2, %ymm1, %ymm1
1560-
; AVX2-NEXT: vpabsd %ymm0, %ymm0
1561-
; AVX2-NEXT: vpabsd %ymm1, %ymm1
1439+
; AVX2-NEXT: vmovdqu (%rdi), %xmm0
1440+
; AVX2-NEXT: vpsadbw (%rsi), %xmm0, %xmm0
15621441
; AVX2-NEXT: movl $1, %eax
1563-
; AVX2-NEXT: vmovd %eax, %xmm2
1564-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1565-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm4 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1566-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm5 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1567-
; AVX2-NEXT: vpsubd %ymm5, %ymm3, %ymm3
1568-
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm5 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
1569-
; AVX2-NEXT: vpsubd %ymm5, %ymm4, %ymm4
1570-
; AVX2-NEXT: vpabsd %ymm3, %ymm3
1571-
; AVX2-NEXT: vpaddd %ymm1, %ymm3, %ymm1
1442+
; AVX2-NEXT: vmovd %eax, %xmm1
15721443
; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
1573-
; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0
1574-
; AVX2-NEXT: vpabsd %ymm4, %ymm1
1444+
; AVX2-NEXT: vmovdqu (%rdx), %xmm1
1445+
; AVX2-NEXT: vpsadbw (%rcx), %xmm1, %xmm1
15751446
; AVX2-NEXT: vpaddd %ymm0, %ymm1, %ymm0
15761447
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
15771448
; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
@@ -1584,17 +1455,13 @@ define i32 @sad_unroll_nonzero_initial(<16 x i8>* %arg, <16 x i8>* %arg1, <16 x
15841455
;
15851456
; AVX512-LABEL: sad_unroll_nonzero_initial:
15861457
; AVX512: # %bb.0: # %bb
1587-
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero,mem[8],zero,zero,zero,mem[9],zero,zero,zero,mem[10],zero,zero,zero,mem[11],zero,zero,zero,mem[12],zero,zero,zero,mem[13],zero,zero,zero,mem[14],zero,zero,zero,mem[15],zero,zero,zero
1588-
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero,mem[8],zero,zero,zero,mem[9],zero,zero,zero,mem[10],zero,zero,zero,mem[11],zero,zero,zero,mem[12],zero,zero,zero,mem[13],zero,zero,zero,mem[14],zero,zero,zero,mem[15],zero,zero,zero
1589-
; AVX512-NEXT: vpsubd %zmm1, %zmm0, %zmm0
1590-
; AVX512-NEXT: vpabsd %zmm0, %zmm0
1458+
; AVX512-NEXT: vmovdqu (%rdi), %xmm0
1459+
; AVX512-NEXT: vpsadbw (%rsi), %xmm0, %xmm0
15911460
; AVX512-NEXT: movl $1, %eax
15921461
; AVX512-NEXT: vmovd %eax, %xmm1
15931462
; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0
1594-
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero,mem[8],zero,zero,zero,mem[9],zero,zero,zero,mem[10],zero,zero,zero,mem[11],zero,zero,zero,mem[12],zero,zero,zero,mem[13],zero,zero,zero,mem[14],zero,zero,zero,mem[15],zero,zero,zero
1595-
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm2 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero,mem[8],zero,zero,zero,mem[9],zero,zero,zero,mem[10],zero,zero,zero,mem[11],zero,zero,zero,mem[12],zero,zero,zero,mem[13],zero,zero,zero,mem[14],zero,zero,zero,mem[15],zero,zero,zero
1596-
; AVX512-NEXT: vpsubd %zmm2, %zmm1, %zmm1
1597-
; AVX512-NEXT: vpabsd %zmm1, %zmm1
1463+
; AVX512-NEXT: vmovdqu (%rdx), %xmm1
1464+
; AVX512-NEXT: vpsadbw (%rcx), %xmm1, %xmm1
15981465
; AVX512-NEXT: vpaddd %zmm0, %zmm1, %zmm0
15991466
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
16001467
; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0

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