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kzhuravlkzhuravl
committedJun 21, 2018
AMDGPU: Remove ability to reserve VGPRs for debugger
Differential Revision: https://reviews.llvm.org/D48234 llvm-svn: 335288
1 parent 37e9739 commit e004b3d

8 files changed

+2
-118
lines changed
 

‎llvm/lib/Target/AMDGPU/AMDGPU.td

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -652,13 +652,6 @@ def FeatureDebuggerInsertNops : SubtargetFeature<
652652
"Insert one nop instruction for each high level source statement"
653653
>;
654654

655-
def FeatureDebuggerReserveRegs : SubtargetFeature<
656-
"amdgpu-debugger-reserve-regs",
657-
"DebuggerReserveRegs",
658-
"true",
659-
"Reserve registers for debugger usage"
660-
>;
661-
662655
def FeatureDebuggerEmitPrologue : SubtargetFeature<
663656
"amdgpu-debugger-emit-prologue",
664657
"DebuggerEmitPrologue",

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -474,13 +474,6 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
474474
" NumVGPRsForWavesPerEU: " +
475475
Twine(CurrentProgramInfo.NumVGPRsForWavesPerEU), false);
476476

477-
OutStreamer->emitRawComment(
478-
" ReservedVGPRFirst: " + Twine(CurrentProgramInfo.ReservedVGPRFirst),
479-
false);
480-
OutStreamer->emitRawComment(
481-
" ReservedVGPRCount: " + Twine(CurrentProgramInfo.ReservedVGPRCount),
482-
false);
483-
484477
OutStreamer->emitRawComment(
485478
" WaveLimiterHint : " + Twine(MFI->needsWaveLimiter()), false);
486479

@@ -831,7 +824,6 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
831824
// unified.
832825
unsigned ExtraSGPRs = IsaInfo::getNumExtraSGPRs(
833826
STM.getFeatureBits(), ProgInfo.VCCUsed, ProgInfo.FlatUsed);
834-
unsigned ExtraVGPRs = STM.getReservedNumVGPRs(MF);
835827

836828
// Check the addressable register limit before we add ExtraSGPRs.
837829
if (STM.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS &&
@@ -852,7 +844,6 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
852844

853845
// Account for extra SGPRs and VGPRs reserved for debugger use.
854846
ProgInfo.NumSGPR += ExtraSGPRs;
855-
ProgInfo.NumVGPR += ExtraVGPRs;
856847

857848
// Ensure there are enough SGPRs and VGPRs for wave dispatch, where wave
858849
// dispatch registers are function args.
@@ -918,10 +909,6 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
918909
ProgInfo.VGPRBlocks = IsaInfo::getNumVGPRBlocks(
919910
STM.getFeatureBits(), ProgInfo.NumVGPRsForWavesPerEU);
920911

921-
// Record first reserved VGPR and number of reserved VGPRs.
922-
ProgInfo.ReservedVGPRFirst = STM.debuggerReserveRegs() ? ProgInfo.NumVGPR : 0;
923-
ProgInfo.ReservedVGPRCount = STM.getReservedNumVGPRs(MF);
924-
925912
// Update DebuggerWavefrontPrivateSegmentOffsetSGPR and
926913
// DebuggerPrivateSegmentBufferSGPR fields if "amdgpu-debugger-emit-prologue"
927914
// attribute was requested.
@@ -1196,8 +1183,6 @@ void AMDGPUAsmPrinter::getAmdKernelCode(amd_kernel_code_t &Out,
11961183
Out.workitem_vgpr_count = CurrentProgramInfo.NumVGPR;
11971184
Out.workitem_private_segment_byte_size = CurrentProgramInfo.ScratchSize;
11981185
Out.workgroup_group_segment_byte_size = CurrentProgramInfo.LDSSize;
1199-
Out.reserved_vgpr_first = CurrentProgramInfo.ReservedVGPRFirst;
1200-
Out.reserved_vgpr_count = CurrentProgramInfo.ReservedVGPRCount;
12011186

12021187
// These alignment values are specified in powers of two, so alignment =
12031188
// 2^n. The minimum alignment is 2^4 = 16.
@@ -1248,8 +1233,6 @@ AMDGPU::HSAMD::Kernel::DebugProps::Metadata AMDGPUAsmPrinter::getHSADebugProps(
12481233

12491234
HSADebugProps.mDebuggerABIVersion.push_back(1);
12501235
HSADebugProps.mDebuggerABIVersion.push_back(0);
1251-
HSADebugProps.mReservedNumVGPRs = ProgramInfo.ReservedVGPRCount;
1252-
HSADebugProps.mReservedFirstVGPR = ProgramInfo.ReservedVGPRFirst;
12531236

12541237
if (STM.debuggerEmitPrologue()) {
12551238
HSADebugProps.mPrivateSegmentBufferSGPR =

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -84,13 +84,6 @@ class AMDGPUAsmPrinter final : public AsmPrinter {
8484
// Number of VGPRs that meets number of waves per execution unit request.
8585
uint32_t NumVGPRsForWavesPerEU = 0;
8686

87-
// If ReservedVGPRCount is 0 then must be 0. Otherwise, this is the first
88-
// fixed VGPR number reserved.
89-
uint16_t ReservedVGPRFirst = 0;
90-
91-
// The number of consecutive VGPRs reserved.
92-
uint16_t ReservedVGPRCount = 0;
93-
9487
// Fixed SGPR number used to hold wave scratch offset for entire kernel
9588
// execution, or std::numeric_limits<uint16_t>::max() if the register is not
9689
// used or not known.

‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,6 @@ AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
124124
EnableXNACK(false),
125125
TrapHandler(false),
126126
DebuggerInsertNops(false),
127-
DebuggerReserveRegs(false),
128127
DebuggerEmitPrologue(false),
129128

130129
EnableHugePrivateBuffer(false),
@@ -550,10 +549,6 @@ unsigned SISubtarget::getMaxNumVGPRs(const MachineFunction &MF) const {
550549
unsigned Requested = AMDGPU::getIntegerAttribute(
551550
F, "amdgpu-num-vgpr", MaxNumVGPRs);
552551

553-
// Make sure requested value does not violate subtarget's specifications.
554-
if (Requested && Requested <= getReservedNumVGPRs(MF))
555-
Requested = 0;
556-
557552
// Make sure requested value is compatible with values implied by
558553
// default/requested minimum/maximum number of waves per execution unit.
559554
if (Requested && Requested > getMaxNumVGPRs(WavesPerEU.first))
@@ -566,7 +561,7 @@ unsigned SISubtarget::getMaxNumVGPRs(const MachineFunction &MF) const {
566561
MaxNumVGPRs = Requested;
567562
}
568563

569-
return MaxNumVGPRs - getReservedNumVGPRs(MF);
564+
return MaxNumVGPRs;
570565
}
571566

572567
namespace {

‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,6 @@ class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
124124
bool EnableXNACK;
125125
bool TrapHandler;
126126
bool DebuggerInsertNops;
127-
bool DebuggerReserveRegs;
128127
bool DebuggerEmitPrologue;
129128

130129
// Used as options.
@@ -823,18 +822,13 @@ class SISubtarget final : public AMDGPUSubtarget {
823822
}
824823

825824
bool debuggerSupported() const {
826-
return debuggerInsertNops() && debuggerReserveRegs() &&
827-
debuggerEmitPrologue();
825+
return debuggerInsertNops() && debuggerEmitPrologue();
828826
}
829827

830828
bool debuggerInsertNops() const {
831829
return DebuggerInsertNops;
832830
}
833831

834-
bool debuggerReserveRegs() const {
835-
return DebuggerReserveRegs;
836-
}
837-
838832
bool debuggerEmitPrologue() const {
839833
return DebuggerEmitPrologue;
840834
}
@@ -962,11 +956,6 @@ class SISubtarget final : public AMDGPUSubtarget {
962956
return AMDGPU::IsaInfo::getMaxNumVGPRs(getFeatureBits(), WavesPerEU);
963957
}
964958

965-
/// \returns Reserved number of VGPRs for given function \p MF.
966-
unsigned getReservedNumVGPRs(const MachineFunction &MF) const {
967-
return debuggerReserveRegs() ? 4 : 0;
968-
}
969-
970959
/// \returns Maximum number of VGPRs that meets number of waves per execution
971960
/// unit requirement for function \p MF, or number of VGPRs explicitly
972961
/// requested using "amdgpu-num-vgpr" attribute attached to function \p MF.

‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,6 @@ class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
8585
AMDGPU::FeatureAutoWaitcntBeforeBarrier,
8686
AMDGPU::FeatureDebuggerEmitPrologue,
8787
AMDGPU::FeatureDebuggerInsertNops,
88-
AMDGPU::FeatureDebuggerReserveRegs,
8988

9089
// Property of the kernel/environment which can't actually differ.
9190
AMDGPU::FeatureSGPRInitBug,

‎llvm/test/CodeGen/AMDGPU/debugger-reserve-regs.ll

Lines changed: 0 additions & 64 deletions
This file was deleted.

‎llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-debug-props.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,6 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
1313
; CHECK: SymbolName: 'test@kd'
1414
; CHECK: DebugProps:
1515
; CHECK: DebuggerABIVersion: [ 1, 0 ]
16-
; CHECK: ReservedNumVGPRs: 4
17-
; GFX700: ReservedFirstVGPR: 8
18-
; GFX802: ReservedFirstVGPR: 8
19-
; GFX900: ReservedFirstVGPR: 10
2016
; CHECK: PrivateSegmentBufferSGPR: 0
2117
; CHECK: WavefrontPrivateSegmentOffsetSGPR: 11
2218
define amdgpu_kernel void @test(i32 addrspace(1)* %A) #0 !dbg !7 !kernel_arg_addr_space !12 !kernel_arg_access_qual !13 !kernel_arg_type !14 !kernel_arg_base_type !14 !kernel_arg_type_qual !15 {

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