@@ -1165,75 +1165,96 @@ let DecoderNamespace = "MicroMips" in {
1165
1165
// MicroMips arbitrary patterns that map to one or more instructions
1166
1166
//===----------------------------------------------------------------------===//
1167
1167
1168
- let AdditionalPredicates = [InMicroMips] in {
1169
- def : MipsPat<(i32 immLi16:$imm),
1170
- (LI16_MM immLi16:$imm)>;
1171
-
1172
- defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>;
1173
- }
1174
-
1175
- let Predicates = [InMicroMips] in {
1176
- def : MipsPat<(not GPRMM16:$in),
1177
- (NOT16_MM GPRMM16:$in)>;
1178
- def : MipsPat<(not GPR32:$in),
1179
- (NOR_MM GPR32Opnd:$in, ZERO)>;
1180
-
1181
- def : MipsPat<(add GPRMM16:$src, immSExtAddiur2:$imm),
1182
- (ADDIUR2_MM GPRMM16:$src, immSExtAddiur2:$imm)>;
1183
- def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm),
1184
- (ADDIUS5_MM GPR32:$src, immSExtAddius5:$imm)>;
1185
- def : MipsPat<(add GPR32:$src, immSExt16:$imm),
1186
- (ADDiu_MM GPR32:$src, immSExt16:$imm)>;
1187
-
1188
- def : MipsPat<(and GPRMM16:$src, immZExtAndi16:$imm),
1189
- (ANDI16_MM GPRMM16:$src, immZExtAndi16:$imm)>;
1190
- def : MipsPat<(and GPR32:$src, immZExt16:$imm),
1191
- (ANDi_MM GPR32:$src, immZExt16:$imm)>;
1192
-
1193
- def : MipsPat<(shl GPRMM16:$src, immZExt2Shift:$imm),
1194
- (SLL16_MM GPRMM16:$src, immZExt2Shift:$imm)>;
1195
- def : MipsPat<(shl GPR32:$src, immZExt5:$imm),
1196
- (SLL_MM GPR32:$src, immZExt5:$imm)>;
1197
- def : MipsPat<(shl GPR32:$lhs, GPR32:$rhs),
1198
- (SLLV_MM GPR32:$lhs, GPR32:$rhs)>;
1199
-
1200
- def : MipsPat<(srl GPRMM16:$src, immZExt2Shift:$imm),
1201
- (SRL16_MM GPRMM16:$src, immZExt2Shift:$imm)>;
1202
- def : MipsPat<(srl GPR32:$src, immZExt5:$imm),
1203
- (SRL_MM GPR32:$src, immZExt5:$imm)>;
1204
- def : MipsPat<(srl GPR32:$lhs, GPR32:$rhs),
1205
- (SRLV_MM GPR32:$lhs, GPR32:$rhs)>;
1206
-
1207
- def : MipsPat<(sra GPR32:$src, immZExt5:$imm),
1208
- (SRA_MM GPR32:$src, immZExt5:$imm)>;
1209
- def : MipsPat<(sra GPR32:$lhs, GPR32:$rhs),
1210
- (SRAV_MM GPR32:$lhs, GPR32:$rhs)>;
1211
-
1212
- def : MipsPat<(store GPRMM16:$src, addrimm4lsl2:$addr),
1213
- (SW16_MM GPRMM16:$src, addrimm4lsl2:$addr)>;
1214
- def : MipsPat<(store GPR32:$src, addr:$addr),
1215
- (SW_MM GPR32:$src, addr:$addr)>;
1216
-
1217
- def : MipsPat<(load addrimm4lsl2:$addr),
1218
- (LW16_MM addrimm4lsl2:$addr)>;
1219
- def : MipsPat<(load addr:$addr),
1220
- (LW_MM addr:$addr)>;
1221
- def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
1222
- (SUBu_MM GPR32:$lhs, GPR32:$rhs)>;
1223
-
1224
- def : MipsPat<(i32 (extloadi1 addr:$src)), (LBu_MM addr:$src)>,
1225
- ISA_MICROMIPS;
1168
+ defm : MipsHiLoRelocs<LUi_MM, ADDiu_MM, ZERO, GPR32Opnd>, ISA_MICROMIPS;
1226
1169
1227
- def : MipsPat<(i32 (extloadi8 addr:$src)), (LBu_MM addr:$src)>,
1228
- ISA_MICROMIPS;
1170
+ def : MipsPat<(MipsGotHi tglobaladdr:$in), (LUi_MM tglobaladdr:$in)>,
1171
+ ISA_MICROMIPS;
1172
+ def : MipsPat<(MipsGotHi texternalsym:$in), (LUi_MM texternalsym:$in)>,
1173
+ ISA_MICROMIPS;
1229
1174
1230
- def : MipsPat<(i32 (extloadi16 addr:$src)), (LHu_MM addr:$src)>,
1231
- ISA_MICROMIPS;
1175
+ // gp_rel relocs
1176
+ def : MipsPat<(add GPR32:$gp, (MipsGPRel tglobaladdr:$in)),
1177
+ (ADDiu_MM GPR32:$gp, tglobaladdr:$in)>, ISA_MICROMIPS;
1178
+ def : MipsPat<(add GPR32:$gp, (MipsGPRel tconstpool:$in)),
1179
+ (ADDiu_MM GPR32:$gp, tconstpool:$in)>, ISA_MICROMIPS;
1180
+
1181
+ def : WrapperPat<tglobaladdr, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1182
+ def : WrapperPat<tconstpool, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1183
+ def : WrapperPat<texternalsym, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1184
+ def : WrapperPat<tblockaddress, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1185
+ def : WrapperPat<tjumptable, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1186
+ def : WrapperPat<tglobaltlsaddr, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1187
+
1188
+ def : MipsPat<(atomic_load_8 addr:$a), (LB_MM addr:$a)>, ISA_MICROMIPS;
1189
+ def : MipsPat<(atomic_load_16 addr:$a), (LH_MM addr:$a)>, ISA_MICROMIPS;
1190
+ def : MipsPat<(atomic_load_32 addr:$a), (LW_MM addr:$a)>, ISA_MICROMIPS;
1191
+
1192
+ def : MipsPat<(i32 immLi16:$imm),
1193
+ (LI16_MM immLi16:$imm)>, ISA_MICROMIPS;
1194
+
1195
+ defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>, ISA_MICROMIPS;
1196
+
1197
+ def : MipsPat<(not GPRMM16:$in),
1198
+ (NOT16_MM GPRMM16:$in)>, ISA_MICROMIPS;
1199
+ def : MipsPat<(not GPR32:$in),
1200
+ (NOR_MM GPR32Opnd:$in, ZERO)>, ISA_MICROMIPS;
1201
+
1202
+ def : MipsPat<(add GPRMM16:$src, immSExtAddiur2:$imm),
1203
+ (ADDIUR2_MM GPRMM16:$src, immSExtAddiur2:$imm)>, ISA_MICROMIPS;
1204
+ def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm),
1205
+ (ADDIUS5_MM GPR32:$src, immSExtAddius5:$imm)>, ISA_MICROMIPS;
1206
+ def : MipsPat<(add GPR32:$src, immSExt16:$imm),
1207
+ (ADDiu_MM GPR32:$src, immSExt16:$imm)>, ISA_MICROMIPS;
1208
+
1209
+ def : MipsPat<(and GPRMM16:$src, immZExtAndi16:$imm),
1210
+ (ANDI16_MM GPRMM16:$src, immZExtAndi16:$imm)>, ISA_MICROMIPS;
1211
+ def : MipsPat<(and GPR32:$src, immZExt16:$imm),
1212
+ (ANDi_MM GPR32:$src, immZExt16:$imm)>, ISA_MICROMIPS;
1213
+
1214
+ def : MipsPat<(shl GPRMM16:$src, immZExt2Shift:$imm),
1215
+ (SLL16_MM GPRMM16:$src, immZExt2Shift:$imm)>, ISA_MICROMIPS;
1216
+ def : MipsPat<(shl GPR32:$src, immZExt5:$imm),
1217
+ (SLL_MM GPR32:$src, immZExt5:$imm)>, ISA_MICROMIPS;
1218
+ def : MipsPat<(shl GPR32:$lhs, GPR32:$rhs),
1219
+ (SLLV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1220
+
1221
+ def : MipsPat<(srl GPRMM16:$src, immZExt2Shift:$imm),
1222
+ (SRL16_MM GPRMM16:$src, immZExt2Shift:$imm)>, ISA_MICROMIPS;
1223
+ def : MipsPat<(srl GPR32:$src, immZExt5:$imm),
1224
+ (SRL_MM GPR32:$src, immZExt5:$imm)>, ISA_MICROMIPS;
1225
+ def : MipsPat<(srl GPR32:$lhs, GPR32:$rhs),
1226
+ (SRLV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1227
+
1228
+ def : MipsPat<(sra GPR32:$src, immZExt5:$imm),
1229
+ (SRA_MM GPR32:$src, immZExt5:$imm)>, ISA_MICROMIPS;
1230
+ def : MipsPat<(sra GPR32:$lhs, GPR32:$rhs),
1231
+ (SRAV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1232
+
1233
+ def : MipsPat<(store GPRMM16:$src, addrimm4lsl2:$addr),
1234
+ (SW16_MM GPRMM16:$src, addrimm4lsl2:$addr)>, ISA_MICROMIPS;
1235
+ def : MipsPat<(store GPR32:$src, addr:$addr),
1236
+ (SW_MM GPR32:$src, addr:$addr)>, ISA_MICROMIPS;
1237
+
1238
+ def : MipsPat<(load addrimm4lsl2:$addr),
1239
+ (LW16_MM addrimm4lsl2:$addr)>, ISA_MICROMIPS;
1240
+ def : MipsPat<(load addr:$addr),
1241
+ (LW_MM addr:$addr)>, ISA_MICROMIPS;
1242
+ def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
1243
+ (SUBu_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1244
+
1245
+ def : MipsPat<(i32 (extloadi1 addr:$src)), (LBu_MM addr:$src)>,
1246
+ ISA_MICROMIPS;
1247
+
1248
+ def : MipsPat<(i32 (extloadi8 addr:$src)), (LBu_MM addr:$src)>,
1249
+ ISA_MICROMIPS;
1250
+
1251
+ def : MipsPat<(i32 (extloadi16 addr:$src)), (LHu_MM addr:$src)>,
1252
+ ISA_MICROMIPS;
1253
+
1254
+ let AddedComplexity = 40 in
1255
+ def : MipsPat<(i32 (sextloadi16 addrRegImm:$a)),
1256
+ (LH_MM addrRegImm:$a)>, ISA_MICROMIPS;
1232
1257
1233
- let AddedComplexity = 40 in
1234
- def : MipsPat<(i32 (sextloadi16 addrRegImm:$a)),
1235
- (LH_MM addrRegImm:$a)>, ISA_MICROMIPS;
1236
- }
1237
1258
1238
1259
def : MipsPat<(bswap GPR32:$rt), (ROTR_MM (WSBH_MM GPR32:$rt), 16)>,
1239
1260
ISA_MICROMIPS;
0 commit comments