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1 |
| -; RUN: llc < %s -enable-unsafe-fp-math -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | +; RUN: llc < %s -enable-unsafe-fp-math -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s |
2 | 3 |
|
3 | 4 |
|
4 | 5 | ; rdar://13126763
|
5 | 6 | ; Expression "x + x*x" was mistakenly transformed into "x * 3.0f".
|
6 | 7 |
|
7 | 8 | define float @test1(float %x) {
|
| 9 | +; CHECK-LABEL: test1: |
| 10 | +; CHECK: ## %bb.0: |
| 11 | +; CHECK-NEXT: vmulss %xmm0, %xmm0, %xmm1 |
| 12 | +; CHECK-NEXT: vaddss %xmm0, %xmm1, %xmm0 |
| 13 | +; CHECK-NEXT: retq |
8 | 14 | %t1 = fmul fast float %x, %x
|
9 | 15 | %t2 = fadd fast float %t1, %x
|
10 | 16 | ret float %t2
|
11 |
| -; CHECK: test1 |
12 |
| -; CHECK: vaddss |
13 | 17 | }
|
14 | 18 |
|
15 | 19 | ; (x + x) + x => x * 3.0
|
16 | 20 | define float @test2(float %x) {
|
| 21 | +; CHECK-LABEL: test2: |
| 22 | +; CHECK: ## %bb.0: |
| 23 | +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 |
| 24 | +; CHECK-NEXT: retq |
17 | 25 | %t1 = fadd fast float %x, %x
|
18 | 26 | %t2 = fadd fast float %t1, %x
|
19 | 27 | ret float %t2
|
20 |
| -; CHECK: .long 1077936128 |
21 |
| -; CHECK: test2 |
22 |
| -; CHECK: vmulss LCPI1_0(%rip), %xmm0, %xmm0 |
23 | 28 | }
|
24 | 29 |
|
25 | 30 | ; x + (x + x) => x * 3.0
|
26 | 31 | define float @test3(float %x) {
|
| 32 | +; CHECK-LABEL: test3: |
| 33 | +; CHECK: ## %bb.0: |
| 34 | +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 |
| 35 | +; CHECK-NEXT: retq |
27 | 36 | %t1 = fadd fast float %x, %x
|
28 |
| - %t2 = fadd fast float %t1, %x |
| 37 | + %t2 = fadd fast float %x, %t1 |
29 | 38 | ret float %t2
|
30 |
| -; CHECK: .long 1077936128 |
31 |
| -; CHECK: test3 |
32 |
| -; CHECK: vmulss LCPI2_0(%rip), %xmm0, %xmm0 |
33 | 39 | }
|
34 | 40 |
|
35 | 41 | ; (y + x) + x != x * 3.0
|
36 | 42 | define float @test4(float %x, float %y) {
|
| 43 | +; CHECK-LABEL: test4: |
| 44 | +; CHECK: ## %bb.0: |
| 45 | +; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm1 |
| 46 | +; CHECK-NEXT: vaddss %xmm0, %xmm1, %xmm0 |
| 47 | +; CHECK-NEXT: retq |
37 | 48 | %t1 = fadd fast float %x, %y
|
38 | 49 | %t2 = fadd fast float %t1, %x
|
39 | 50 | ret float %t2
|
40 |
| -; CHECK: test4 |
41 |
| -; CHECK: vaddss |
42 | 51 | }
|
43 | 52 |
|
44 | 53 | ; rdar://13445387
|
45 |
| -; "x + x + x => 3.0 * x" should be disabled after legalization because |
| 54 | +; "x + x + x => 3.0 * x" should be disabled after legalization because |
46 | 55 | ; Instruction-Selection doesn't know how to handle "3.0"
|
47 |
| -; |
48 |
| -define float @test5() { |
49 |
| - %mul.i.i151 = fmul <4 x float> zeroinitializer, zeroinitializer |
50 |
| - %vecext.i8.i152 = extractelement <4 x float> %mul.i.i151, i32 1 |
51 |
| - %vecext1.i9.i153 = extractelement <4 x float> %mul.i.i151, i32 0 |
52 |
| - %add.i10.i154 = fadd float %vecext1.i9.i153, %vecext.i8.i152 |
53 |
| - %vecext.i7.i155 = extractelement <4 x float> %mul.i.i151, i32 2 |
54 |
| - %add.i.i156 = fadd float %vecext.i7.i155, %add.i10.i154 |
55 |
| - ret float %add.i.i156 |
| 56 | +; |
| 57 | +define float @test5(<4 x float> %x) { |
| 58 | +; CHECK-LABEL: test5: |
| 59 | +; CHECK: ## %bb.0: |
| 60 | +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 |
| 61 | +; CHECK-NEXT: retq |
| 62 | + %splat = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> zeroinitializer |
| 63 | + %v1 = extractelement <4 x float> %splat, i32 1 |
| 64 | + %v0 = extractelement <4 x float> %splat, i32 0 |
| 65 | + %add1 = fadd float %v0, %v1 |
| 66 | + %v2 = extractelement <4 x float> %splat, i32 2 |
| 67 | + %add2 = fadd float %v2, %add1 |
| 68 | + ret float %add2 |
56 | 69 | }
|
| 70 | + |
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