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LebedevRILebedevRI
committedJun 6, 2018
[InstCombine][NFC] PR37603: low bit mask canonicalization tests
Differential Revision: https://reviews.llvm.org/D47427 llvm-svn: 334126
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‎llvm/test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; https://bugs.llvm.org/show_bug.cgi?id=37603
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; Pattern:
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; (1 << NBits) - 1
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; Should be transformed into:
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; ~(-(1 << NBits))
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; The `not` may end up being folded into `and`
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; ============================================================================ ;
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; Most basic positive tests
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; ============================================================================ ;
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; No no-wrap tags on shl
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define i32 @shl_add(i32 %NBits) {
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; CHECK-LABEL: @shl_add(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_add_nsw(i32 %NBits) {
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; CHECK-LABEL: @shl_add_nsw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add nsw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_add_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_add_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add nuw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_add_nsw_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_add_nsw_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add nuw nsw i32 %setbit, -1
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ret i32 %ret
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}
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; shl is nsw
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define i32 @shl_nsw_add(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_add(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nsw i32 1, %NBits
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_add_nsw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_add_nsw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nsw i32 1, %NBits
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%ret = add nsw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_add_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_add_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nsw i32 1, %NBits
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%ret = add nuw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_add_nsw_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_add_nsw_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nsw i32 1, %NBits
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%ret = add nuw nsw i32 %setbit, -1
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ret i32 %ret
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}
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; shl is nuw
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define i32 @shl_nuw_add(i32 %NBits) {
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; CHECK-LABEL: @shl_nuw_add(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw i32 1, %NBits
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nuw_add_nsw(i32 %NBits) {
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; CHECK-LABEL: @shl_nuw_add_nsw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw i32 1, %NBits
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%ret = add nsw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nuw_add_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nuw_add_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw i32 1, %NBits
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%ret = add nuw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nuw_add_nsw_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nuw_add_nsw_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw i32 1, %NBits
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%ret = add nuw nsw i32 %setbit, -1
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ret i32 %ret
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}
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; shl is nuw nsw
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define i32 @shl_nsw_nuw_add(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_nuw_add(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw nsw i32 1, %NBits
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_nuw_add_nsw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_nuw_add_nsw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw nsw i32 1, %NBits
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%ret = add nsw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_nuw_add_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_nuw_add_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw nsw i32 1, %NBits
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%ret = add nuw i32 %setbit, -1
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ret i32 %ret
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}
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define i32 @shl_nsw_nuw_add_nsw_nuw(i32 %NBits) {
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; CHECK-LABEL: @shl_nsw_nuw_add_nsw_nuw(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl nuw nsw i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl nuw nsw i32 1, %NBits
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%ret = add nuw nsw i32 %setbit, -1
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ret i32 %ret
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}
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; ============================================================================ ;
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; Vectors
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; ============================================================================ ;
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define <2 x i32> @shl_add_vec(<2 x i32> %NBits) {
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; CHECK-LABEL: @shl_add_vec(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add <2 x i32> [[SETBIT]], <i32 -1, i32 -1>
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; CHECK-NEXT: ret <2 x i32> [[RET]]
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;
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%setbit = shl <2 x i32> <i32 1, i32 1>, %NBits
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%ret = add <2 x i32> %setbit, <i32 -1, i32 -1>
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ret <2 x i32> %ret
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}
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define <3 x i32> @shl_add_vec_undef0(<3 x i32> %NBits) {
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; CHECK-LABEL: @shl_add_vec_undef0(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl <3 x i32> <i32 1, i32 undef, i32 1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add <3 x i32> [[SETBIT]], <i32 -1, i32 -1, i32 -1>
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; CHECK-NEXT: ret <3 x i32> [[RET]]
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;
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%setbit = shl <3 x i32> <i32 1, i32 undef, i32 1>, %NBits
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%ret = add <3 x i32> %setbit, <i32 -1, i32 -1, i32 -1>
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ret <3 x i32> %ret
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}
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define <3 x i32> @shl_add_vec_undef1(<3 x i32> %NBits) {
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; CHECK-LABEL: @shl_add_vec_undef1(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl <3 x i32> <i32 1, i32 1, i32 1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add <3 x i32> [[SETBIT]], <i32 -1, i32 undef, i32 -1>
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; CHECK-NEXT: ret <3 x i32> [[RET]]
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;
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%setbit = shl <3 x i32> <i32 1, i32 1, i32 1>, %NBits
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%ret = add <3 x i32> %setbit, <i32 -1, i32 undef, i32 -1>
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ret <3 x i32> %ret
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}
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define <3 x i32> @shl_add_vec_undef2(<3 x i32> %NBits) {
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; CHECK-LABEL: @shl_add_vec_undef2(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl <3 x i32> <i32 1, i32 undef, i32 1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add <3 x i32> [[SETBIT]], <i32 -1, i32 undef, i32 -1>
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; CHECK-NEXT: ret <3 x i32> [[RET]]
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;
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%setbit = shl <3 x i32> <i32 1, i32 undef, i32 1>, %NBits
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%ret = add <3 x i32> %setbit, <i32 -1, i32 undef, i32 -1>
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ret <3 x i32> %ret
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}
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; ============================================================================ ;
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; Negative tests. Should not be folded.
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; ============================================================================ ;
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declare void @use32(i32)
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; One use only.
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define i32 @bad_oneuse0(i32 %NBits) {
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; CHECK-LABEL: @bad_oneuse0(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: call void @use32(i32 [[SETBIT]])
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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call void @use32(i32 %setbit)
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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; shift base is not `1` constant
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define i32 @bad_shl(i32 %base, i32 %NBits) {
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; CHECK-LABEL: @bad_shl(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 [[BASE:%.*]], [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 %base, %NBits ; %base instead of 1
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%ret = add i32 %setbit, -1
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ret i32 %ret
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}
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; Second `add` operand is not `-1` constant
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define i32 @bad_add0(i32 %NBits, i32 %addop2) {
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; CHECK-LABEL: @bad_add0(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], [[ADDOP2:%.*]]
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add i32 %setbit, %addop2
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ret i32 %ret
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}
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; Bad add constant
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define i32 @bad_add1(i32 %NBits) {
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; CHECK-LABEL: @bad_add1(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], 1
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add i32 %setbit, 1 ; not -1
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ret i32 %ret
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}
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define i32 @bad_add2(i32 %NBits) {
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; CHECK-LABEL: @bad_add2(
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; CHECK-NEXT: [[SETBIT:%.*]] = shl i32 1, [[NBITS:%.*]]
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; CHECK-NEXT: [[RET:%.*]] = add i32 [[SETBIT]], -2
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%setbit = shl i32 1, %NBits
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%ret = add i32 %setbit, -2 ; not -1
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ret i32 %ret
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}

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