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RKSimonRKSimon
committedMar 24, 2018
[X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on AVX targets
And ensure we don't use later instruction sets in SSE schedule tests llvm-svn: 328423
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‎llvm/test/CodeGen/X86/sse-schedule.ll

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‎llvm/test/CodeGen/X86/sse2-schedule.ll

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‎llvm/test/CodeGen/X86/sse3-schedule.ll

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‎llvm/test/CodeGen/X86/sse41-schedule.ll

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‎llvm/test/CodeGen/X86/sse42-schedule.ll

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‎llvm/test/CodeGen/X86/ssse3-schedule.ll

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