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Commit b86b771

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author
Amjad Aboud
committedJan 31, 2018
[AggressiveInstCombine] Fixed TruncCombine class to handle TruncInst leaf node correctly.
This covers the case where TruncInst leaf node is a constant expression. See PR36121 for more details. Differential Revision: https://reviews.llvm.org/D42622 llvm-svn: 323926
·
llvmorg-21-initllvmorg-7.0.0-rc1
1 parent e44faf5 commit b86b771

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3 files changed

+99
-4
lines changed

3 files changed

+99
-4
lines changed
 

‎llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -317,6 +317,7 @@ void TruncInstCombine::ReduceExpressionDag(Type *SclTy) {
317317
// just return the source. There's no need to insert it because it is not
318318
// new.
319319
if (I->getOperand(0)->getType() == Ty) {
320+
assert(!isa<TruncInst>(I) && "Cannot reach here with TruncInst");
320321
NodeInfo.NewValue = I->getOperand(0);
321322
continue;
322323
}
@@ -326,11 +327,18 @@ void TruncInstCombine::ReduceExpressionDag(Type *SclTy) {
326327
Opc == Instruction::SExt);
327328

328329
// Update Worklist entries with new value if needed.
329-
if (auto *NewCI = dyn_cast<TruncInst>(Res)) {
330-
auto Entry = find(Worklist, I);
331-
if (Entry != Worklist.end())
330+
// There are three possible changes to the Worklist:
331+
// 1. Update Old-TruncInst -> New-TruncInst.
332+
// 2. Remove Old-TruncInst (if New node is not TruncInst).
333+
// 3. Add New-TruncInst (if Old node was not TruncInst).
334+
auto Entry = find(Worklist, I);
335+
if (Entry != Worklist.end()) {
336+
if (auto *NewCI = dyn_cast<TruncInst>(Res))
332337
*Entry = NewCI;
333-
}
338+
else
339+
Worklist.erase(Entry);
340+
} else if (auto *NewCI = dyn_cast<TruncInst>(Res))
341+
Worklist.push_back(NewCI);
334342
break;
335343
}
336344
case Instruction::Add:

‎llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,37 @@ define void @const_expression_trunc() {
4646
ret void
4747
}
4848

49+
; Check that we handle constant expression trunc instruction, when it is a leaf
50+
; of other trunc expression pattern:
51+
; 1. %T1 is the constant expression trunc instruction.
52+
; 2. %T2->%T1 is the trunc expression pattern we want to reduce.
53+
define void @const_expression_trunc_leaf() {
54+
; CHECK-LABEL: @const_expression_trunc_leaf(
55+
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 44)
56+
; CHECK-NEXT: ret void
57+
;
58+
%T1 = trunc i64 44 to i48
59+
%T2 = trunc i48 %T1 to i32
60+
call i32 @use32(i32 %T2)
61+
ret void
62+
}
63+
64+
; Check that we handle zext instruction, which turns into trunc instruction.
65+
; Notice that there are two expression patterns below:
66+
; 1. %T2->%T1
67+
; 2. %T1`->%A (where %T1` is the reduced node of %T1 into trunc instruction)
68+
define void @const_expression_zext_to_trunc() {
69+
; CHECK-LABEL: @const_expression_zext_to_trunc(
70+
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 44)
71+
; CHECK-NEXT: ret void
72+
;
73+
%A = add i64 11, 33
74+
%T1 = zext i64 %A to i128
75+
%T2 = trunc i128 %T1 to i32
76+
call i32 @use32(i32 %T2)
77+
ret void
78+
}
79+
4980
define void @const_expression_mul_vec() {
5081
; CHECK-LABEL: @const_expression_mul_vec(
5182
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 24531, i32 24864>)

‎llvm/test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,3 +212,59 @@ define void @multi_use_vec_sub(<2 x i32> %X, <2 x i32> %Y) {
212212
call <2 x i32> @use64_vec(<2 x i64> %A2)
213213
ret void
214214
}
215+
216+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
217+
;; These tests check cases where expression dag post-dominated by TruncInst
218+
;; contains TruncInst leaf or ZEXT/SEXT leafs which turn into TruncInst leaves.
219+
;; Check that both expressions are reduced and no TruncInst remains or (was
220+
;; generated).
221+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
222+
223+
; Notice that there are two expression patterns below:
224+
; 1. %T2->%C2->(%B2->(%T1, 15), %B2->(%T1, 15))
225+
; 2. %T1`->%C1->(%B1->(%A1, 15), %B1->(%A1, 15))
226+
; (where %T1` is the reduced node of %T1 into trunc instruction)
227+
define void @trunc_as_a_leaf(i32 %X) {
228+
; CHECK-LABEL: @trunc_as_a_leaf(
229+
; CHECK-NEXT: [[B1:%.*]] = add i32 [[X:%.*]], 15
230+
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
231+
; CHECK-NEXT: [[B2:%.*]] = add i32 [[C1]], 15
232+
; CHECK-NEXT: [[C2:%.*]] = mul i32 [[B2]], [[B2]]
233+
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C2]])
234+
; CHECK-NEXT: ret void
235+
;
236+
%A1 = zext i32 %X to i64
237+
%B1 = add i64 %A1, 15
238+
%C1 = mul i64 %B1, %B1
239+
%T1 = trunc i64 %C1 to i48 ; leaf trunc
240+
%B2 = add i48 %T1, 15
241+
%C2 = mul i48 %B2, %B2
242+
%T2 = trunc i48 %C2 to i32
243+
call i32 @use32(i32 %T2)
244+
ret void
245+
}
246+
247+
; Notice that there are two expression patterns below:
248+
; 1. %T2->%C2->(%B2->(%T1, 15), %B2->(%T1, 15))
249+
; 2. %T1`->%C1->(%B1->(%A1, 15), %B1->(%A1, 15))
250+
; (where %T1` is the reduced node of %T1 into trunc instruction)
251+
define void @zext_as_a_leaf(i16 %X) {
252+
; CHECK-LABEL: @zext_as_a_leaf(
253+
; CHECK-NEXT: [[A1:%.*]] = zext i16 [[X:%.*]] to i32
254+
; CHECK-NEXT: [[B1:%.*]] = add i32 [[A1]], 15
255+
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
256+
; CHECK-NEXT: [[B2:%.*]] = add i32 [[C1]], 15
257+
; CHECK-NEXT: [[C2:%.*]] = mul i32 [[B2]], [[B2]]
258+
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C2]])
259+
; CHECK-NEXT: ret void
260+
;
261+
%A1 = zext i16 %X to i48
262+
%B1 = add i48 %A1, 15
263+
%C1 = mul i48 %B1, %B1
264+
%T1 = zext i48 %C1 to i64 ; leaf zext, which will turn into trunc
265+
%B2 = add i64 %T1, 15
266+
%C2 = mul i64 %B2, %B2
267+
%T2 = trunc i64 %C2 to i32
268+
call i32 @use32(i32 %T2)
269+
ret void
270+
}

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