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Commit d567c27

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committedJan 26, 2018
[X86][SSE] Drop PMADDWD in lowerMul
As mentioned in D42258, we don't need this any more llvm-svn: 323540
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‎llvm/lib/Target/X86/X86ISelLowering.cpp

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@@ -22262,13 +22262,6 @@ static SDValue LowerMUL(SDValue Op, const X86Subtarget &Subtarget,
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assert(Subtarget.hasSSE2() && !Subtarget.hasSSE41() &&
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"Should not custom lower when pmulld is available!");
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// If the upper 17 bits of each element are zero then we can use PMADDWD.
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APInt Mask17 = APInt::getHighBitsSet(32, 17);
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if (DAG.MaskedValueIsZero(A, Mask17) && DAG.MaskedValueIsZero(B, Mask17))
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return DAG.getNode(X86ISD::VPMADDWD, dl, VT,
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DAG.getBitcast(MVT::v8i16, A),
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DAG.getBitcast(MVT::v8i16, B));
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// Extract the odd parts.
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static const int UnpackMask[] = { 1, -1, 3, -1 };
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SDValue Aodds = DAG.getVectorShuffle(VT, dl, A, A, UnpackMask);

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