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ostannardostannard
committedNov 21, 2017
[ARM] Remove pre-UAL FLDM/FSTM aliases
These are pre-UAL syntax, and we don't support any other pre-UAL instructions, with the exception of FLDMX/FSTMX, which don't have a UAL equivalent. Therefore there's no reason to keep them or their AsmParser hacks around. With the AsmParser hacks removed, the FLDMX and FSTMX instructions get the same operand diagnostics as the UAL instructions. Differential revision: https://reviews.llvm.org/D39196 llvm-svn: 318777
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5 files changed

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‎llvm/lib/Target/ARM/ARMInstrVFP.td

+2-22
Original file line numberDiff line numberDiff line change
@@ -255,28 +255,6 @@ def VLSTM : AXSI4<(outs), (ins GPRnopc:$Rn, pred:$p), IndexModeNone,
255255
let mayStore = 1;
256256
}
257257

258-
259-
// FLDM/FSTM - Load / Store multiple single / double precision registers for
260-
// pre-ARMv6 cores.
261-
// These instructions are deprecated!
262-
def : VFP2MnemonicAlias<"fldmias", "vldmia">;
263-
def : VFP2MnemonicAlias<"fldmdbs", "vldmdb">;
264-
def : VFP2MnemonicAlias<"fldmeas", "vldmdb">;
265-
def : VFP2MnemonicAlias<"fldmfds", "vldmia">;
266-
def : VFP2MnemonicAlias<"fldmiad", "vldmia">;
267-
def : VFP2MnemonicAlias<"fldmdbd", "vldmdb">;
268-
def : VFP2MnemonicAlias<"fldmead", "vldmdb">;
269-
def : VFP2MnemonicAlias<"fldmfdd", "vldmia">;
270-
271-
def : VFP2MnemonicAlias<"fstmias", "vstmia">;
272-
def : VFP2MnemonicAlias<"fstmdbs", "vstmdb">;
273-
def : VFP2MnemonicAlias<"fstmeas", "vstmia">;
274-
def : VFP2MnemonicAlias<"fstmfds", "vstmdb">;
275-
def : VFP2MnemonicAlias<"fstmiad", "vstmia">;
276-
def : VFP2MnemonicAlias<"fstmdbd", "vstmdb">;
277-
def : VFP2MnemonicAlias<"fstmead", "vstmia">;
278-
def : VFP2MnemonicAlias<"fstmfdd", "vstmdb">;
279-
280258
def : InstAlias<"vpush${p} $r", (VSTMDDB_UPD SP, pred:$p, dpr_reglist:$r), 0>,
281259
Requires<[HasVFP2]>;
282260
def : InstAlias<"vpush${p} $r", (VSTMSDB_UPD SP, pred:$p, spr_reglist:$r), 0>,
@@ -297,6 +275,8 @@ defm : VFPDTAnyInstAlias<"vpop${p}", "$r",
297275
// FLDMX, FSTMX - Load and store multiple unknown precision registers for
298276
// pre-armv6 cores.
299277
// These instruction are deprecated so we don't want them to get selected.
278+
// However, there is no UAL syntax for them, so we keep them around for
279+
// (dis)assembly only.
300280
multiclass vfp_ldstx_mult<string asm, bit L_bit> {
301281
// Unknown precision
302282
def XIA :

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

-36
Original file line numberDiff line numberDiff line change
@@ -5843,25 +5843,6 @@ static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) {
58435843
static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features,
58445844
unsigned VariantID);
58455845

5846-
static bool RequiresVFPRegListValidation(StringRef Inst,
5847-
bool &AcceptSinglePrecisionOnly,
5848-
bool &AcceptDoublePrecisionOnly) {
5849-
if (Inst.size() < 7)
5850-
return false;
5851-
5852-
if (Inst.startswith("fldm") || Inst.startswith("fstm")) {
5853-
StringRef AddressingMode = Inst.substr(4, 2);
5854-
if (AddressingMode == "ia" || AddressingMode == "db" ||
5855-
AddressingMode == "ea" || AddressingMode == "fd") {
5856-
AcceptSinglePrecisionOnly = Inst[6] == 's';
5857-
AcceptDoublePrecisionOnly = Inst[6] == 'd' || Inst[6] == 'x';
5858-
return true;
5859-
}
5860-
}
5861-
5862-
return false;
5863-
}
5864-
58655846
// The GNU assembler has aliases of ldrd and strd with the second register
58665847
// omitted. We don't have a way to do that in tablegen, so fix it up here.
58675848
//
@@ -5911,13 +5892,6 @@ void ARMAsmParser::fixupGNULDRDAlias(StringRef Mnemonic,
59115892
bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
59125893
SMLoc NameLoc, OperandVector &Operands) {
59135894
MCAsmParser &Parser = getParser();
5914-
// FIXME: Can this be done via tablegen in some fashion?
5915-
bool RequireVFPRegisterListCheck;
5916-
bool AcceptSinglePrecisionOnly;
5917-
bool AcceptDoublePrecisionOnly;
5918-
RequireVFPRegisterListCheck =
5919-
RequiresVFPRegListValidation(Name, AcceptSinglePrecisionOnly,
5920-
AcceptDoublePrecisionOnly);
59215895

59225896
// Apply mnemonic aliases before doing anything else, as the destination
59235897
// mnemonic may include suffices and we want to handle them normally.
@@ -6075,16 +6049,6 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
60756049
if (parseToken(AsmToken::EndOfStatement, "unexpected token in argument list"))
60766050
return true;
60776051

6078-
if (RequireVFPRegisterListCheck) {
6079-
ARMOperand &Op = static_cast<ARMOperand &>(*Operands.back());
6080-
if (AcceptSinglePrecisionOnly && !Op.isSPRRegList())
6081-
return Error(Op.getStartLoc(),
6082-
"VFP/Neon single precision register expected");
6083-
if (AcceptDoublePrecisionOnly && !Op.isDPRRegList())
6084-
return Error(Op.getStartLoc(),
6085-
"VFP/Neon double precision register expected");
6086-
}
6087-
60886052
tryConvertingToTwoOperandForm(Mnemonic, CarrySetting, Operands);
60896053

60906054
// Some instructions, mostly Thumb, have forms for the same mnemonic that

‎llvm/test/MC/ARM/directive-fpu-instrs.s

-2
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,3 @@ str r6, [r7, #264]
1212
mov r6, r5
1313
vldr d21, [r7, #296]
1414
add r9, r7, #216
15-
16-
fstmfdd sp!, {d8, d9, d10, d11, d12, d13, d14, d15}

‎llvm/test/MC/ARM/vfp-aliases-diagnostics.s

+8-76
Original file line numberDiff line numberDiff line change
@@ -6,109 +6,41 @@
66

77
.type aliases,%function
88
aliases:
9-
fstmfdd sp!, {s0}
10-
fstmead sp!, {s0}
11-
fstmdbd sp!, {s0}
12-
fstmiad sp!, {s0}
13-
fstmfds sp!, {d0}
14-
fstmeas sp!, {d0}
15-
fstmdbs sp!, {d0}
16-
fstmias sp!, {d0}
17-
18-
fldmias sp!, {d0}
19-
fldmdbs sp!, {d0}
20-
fldmeas sp!, {d0}
21-
fldmfds sp!, {d0}
22-
fldmiad sp!, {s0}
23-
fldmdbd sp!, {s0}
24-
fldmead sp!, {s0}
25-
fldmfdd sp!, {s0}
26-
279
fstmeax sp!, {s0}
2810
fldmfdx sp!, {s0}
2911

3012
fstmfdx sp!, {s0}
3113
fldmeax sp!, {s0}
3214

3315
@ CHECK-LABEL: aliases
34-
@ CHECK: error: VFP/Neon double precision register expected
35-
@ CHECK: fstmfdd sp!, {s0}
36-
@ CHECK: ^
37-
@ CHECK: error: VFP/Neon double precision register expected
38-
@ CHECK: fstmead sp!, {s0}
39-
@ CHECK: ^
40-
@ CHECK: error: VFP/Neon double precision register expected
41-
@ CHECK: fstmdbd sp!, {s0}
42-
@ CHECK: ^
43-
@ CHECK: error: VFP/Neon double precision register expected
44-
@ CHECK: fstmiad sp!, {s0}
45-
@ CHECK: ^
46-
@ CHECK: error: VFP/Neon single precision register expected
47-
@ CHECK: fstmfds sp!, {d0}
48-
@ CHECK: ^
49-
@ CHECK: error: VFP/Neon single precision register expected
50-
@ CHECK: fstmeas sp!, {d0}
51-
@ CHECK: ^
52-
@ CHECK: error: VFP/Neon single precision register expected
53-
@ CHECK: fstmdbs sp!, {d0}
54-
@ CHECK: ^
55-
@ CHECK: error: VFP/Neon single precision register expected
56-
@ CHECK: fstmias sp!, {d0}
57-
@ CHECK: ^
58-
59-
@ CHECK: error: VFP/Neon single precision register expected
60-
@ CHECK: fldmias sp!, {d0}
61-
@ CHECK: ^
62-
@ CHECK: error: VFP/Neon single precision register expected
63-
@ CHECK: fldmdbs sp!, {d0}
64-
@ CHECK: ^
65-
@ CHECK: error: VFP/Neon single precision register expected
66-
@ CHECK: fldmeas sp!, {d0}
67-
@ CHECK: ^
68-
@ CHECK: error: VFP/Neon single precision register expected
69-
@ CHECK: fldmfds sp!, {d0}
70-
@ CHECK: ^
71-
@ CHECK: error: VFP/Neon double precision register expected
72-
@ CHECK: fldmiad sp!, {s0}
73-
@ CHECK: ^
74-
@ CHECK: error: VFP/Neon double precision register expected
75-
@ CHECK: fldmdbd sp!, {s0}
76-
@ CHECK: ^
77-
@ CHECK: error: VFP/Neon double precision register expected
78-
@ CHECK: fldmead sp!, {s0}
79-
@ CHECK: ^
80-
@ CHECK: error: VFP/Neon double precision register expected
81-
@ CHECK: fldmfdd sp!, {s0}
82-
@ CHECK: ^
83-
84-
@ CHECK: error: VFP/Neon double precision register expected
16+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
8517
@ CHECK: fstmeax sp!, {s0}
8618
@ CHECK: ^
87-
@ CHECK: error: VFP/Neon double precision register expected
19+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
8820
@ CHECK: fldmfdx sp!, {s0}
8921
@ CHECK: ^
9022

91-
@ CHECK: error: VFP/Neon double precision register expected
23+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
9224
@ CHECK: fstmfdx sp!, {s0}
9325
@ CHECK: ^
94-
@ CHECK: error: VFP/Neon double precision register expected
26+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
9527
@ CHECK: fldmeax sp!, {s0}
9628
@ CHECK: ^
9729

9830
fstmiaxcs r0, {s0}
9931
fstmiaxhs r0, {s0}
10032
fstmiaxls r0, {s0}
10133
fstmiaxvs r0, {s0}
102-
@ CHECK: error: VFP/Neon double precision register expected
34+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
10335
@ CHECK: fstmiaxcs r0, {s0}
10436
@ CHECK: ^
105-
@ CHECK: error: VFP/Neon double precision register expected
37+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
10638
@ CHECK: fstmiaxhs r0, {s0}
10739
@ CHECK: ^
108-
@ CHECK: error: VFP/Neon double precision register expected
40+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
10941
@ CHECK: fstmiaxls r0, {s0}
11042
@ CHECK: ^
111-
@ CHECK: error: VFP/Neon double precision register expected
43+
@ CHECK: error: operand must be a list of registers in range [d0, d31]
11244
@ CHECK: fstmiaxvs r0, {s0}
11345
@ CHECK: ^
11446

‎llvm/test/MC/ARM/vfp-aliases.s

-34
Original file line numberDiff line numberDiff line change
@@ -5,47 +5,13 @@
55

66
.type aliases,%function
77
aliases:
8-
fstmfdd sp!, {d0}
9-
fstmead sp!, {d0}
10-
fstmdbd sp!, {d0}
11-
fstmiad sp!, {d0}
12-
fstmfds sp!, {s0}
13-
fstmeas sp!, {s0}
14-
fstmdbs sp!, {s0}
15-
fstmias sp!, {s0}
16-
17-
fldmias sp!, {s0}
18-
fldmdbs sp!, {s0}
19-
fldmeas sp!, {s0}
20-
fldmfds sp!, {s0}
21-
fldmiad sp!, {d0}
22-
fldmdbd sp!, {d0}
23-
fldmead sp!, {d0}
24-
fldmfdd sp!, {d0}
25-
268
fstmeax sp!, {d0}
279
fldmfdx sp!, {d0}
2810

2911
fstmfdx sp!, {d0}
3012
fldmeax sp!, {d0}
3113

3214
@ CHECK-LABEL: aliases
33-
@ CHECK: vpush {d0}
34-
@ CHECK: vstmia sp!, {d0}
35-
@ CHECK: vpush {d0}
36-
@ CHECK: vstmia sp!, {d0}
37-
@ CHECK: vpush {s0}
38-
@ CHECK: vstmia sp!, {s0}
39-
@ CHECK: vpush {s0}
40-
@ CHECK: vstmia sp!, {s0}
41-
@ CHECK: vpop {s0}
42-
@ CHECK: vldmdb sp!, {s0}
43-
@ CHECK: vldmdb sp!, {s0}
44-
@ CHECK: vpop {s0}
45-
@ CHECK: vpop {d0}
46-
@ CHECK: vldmdb sp!, {d0}
47-
@ CHECK: vldmdb sp!, {d0}
48-
@ CHECK: vpop {d0}
4915
@ CHECK: fstmiax sp!, {d0}
5016
@ CHECK: fldmiax sp!, {d0}
5117
@ CHECK: fstmdbx sp!, {d0}

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