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petar-jovanovicpetar-jovanovic
committedSep 11, 2017
[mips][microMIPS] add lapc instruction
Implement LAPC instruction for mips32r6, mips64r6 and micromips32r6. Patch by Milos Stojanovic. Differential Revision: https://reviews.llvm.org/D35984 llvm-svn: 312934
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‎llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1829,6 +1829,9 @@ def : MipsInstAlias<"seh $rd", (SEH_MMR6 GPR32Opnd:$rd, GPR32Opnd:$rd), 0>,
18291829
ISA_MICROMIPS32R6;
18301830
def : MipsInstAlias<"seb $rd", (SEB_MMR6 GPR32Opnd:$rd, GPR32Opnd:$rd), 0>,
18311831
ISA_MICROMIPS32R6;
1832+
def : MipsInstAlias<"lapc $rd, $imm",
1833+
(ADDIUPC_MMR6 GPR32Opnd:$rd, simm19_lsl2:$imm)>,
1834+
ISA_MICROMIPS32R6;
18321835

18331836
//===----------------------------------------------------------------------===//
18341837
//

‎llvm/lib/Target/Mips/Mips32r6InstrInfo.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -950,6 +950,9 @@ def : MipsInstAlias<"div $rs, $rt", (DIV GPR32Opnd:$rs, GPR32Opnd:$rs,
950950
def : MipsInstAlias<"divu $rs, $rt", (DIVU GPR32Opnd:$rs, GPR32Opnd:$rs,
951951
GPR32Opnd:$rt)>, ISA_MIPS32R6;
952952

953+
def : MipsInstAlias<"lapc $rd, $imm",
954+
(ADDIUPC GPR32Opnd:$rd, simm19_lsl2:$imm)>, ISA_MIPS32R6;
955+
953956
//===----------------------------------------------------------------------===//
954957
//
955958
// Patterns and Pseudo Instructions

‎llvm/test/MC/Disassembler/Mips/micromips32r6/valid.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
0x00 0xa4 0x19 0x10 # CHECK: add $3, $4, $5
3333
0x30 0x64 0x04 0xd2 # CHECK: addiu $3, $4, 1234
3434
0x00 0xa4 0x19 0x50 # CHECK: addu $3, $4, $5
35-
0x78 0x80 0x00 0x19 # CHECK: addiupc $4, 100
35+
0x78 0x80 0x00 0x19 # CHECK: lapc $4, 100
3636
0x78 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
3737
0x78 0x7e 0xff 0xff # CHECK: auipc $3, -1
3838
0x00 0x43 0x24 0x1f # CHECK: align $4, $2, $3, 2

‎llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r6 | FileCheck %s
22
0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
3-
0x19 0x00 0x80 0xec # CHECK: addiupc $4, 100
3+
0x19 0x00 0x80 0xec # CHECK: lapc $4, 100
44
0x0a 0x00 0x29 0x25 # CHECK: addiu $9, $9, 10
55
0xa0 0x22 0x43 0x7c # CHECK: align $4, $2, $3, 2
66
0x38 0x00 0x7f 0xec # CHECK: aluipc $3, 56

‎llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,7 @@
193193
0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
194194
0xec 0x7e 0xff 0xff # CHECK: auipc $3, -1
195195
0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
196-
0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
196+
0xec 0x80 0x00 0x19 # CHECK: lapc $4, 100
197197
0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
198198
0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
199199
0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20

‎llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
# RUN: llvm-mc %s -disassemble -triple=mipsel-unknown-linux -mcpu=mips64r6 | FileCheck %s
22
0x0a 0x00 0x29 0x25 # CHECK: addiu $9, $9, 10
3-
0x19 0x00 0x80 0xec # CHECK: addiupc $4, 100
43
0xa0 0x22 0x43 0x7c # CHECK: align $4, $2, $3, 2
54
0x38 0x00 0x7f 0xec # CHECK: aluipc $3, 56
65
0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
@@ -129,6 +128,7 @@
129128
0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256
130129
0x00 0x00 0x1b 0xd8 # CHECK: jrc $27
131130
0x09 0x04 0x80 0x00 # CHECK: jr.hb $4
131+
0x19 0x00 0x80 0xec # CHECK: lapc $4, 100
132132
0x43 0x0d 0xc8 0x49 # CHECK: ldc2 $8, -701($1)
133133
0x48 0x3c 0x58 0xec # CHECK: ldpc $2, 123456
134134
0xb6 0xb3 0x42 0x7e # CHECK: ll $2, -153($18)

‎llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@
218218
0xec 0x58 0x3c 0x48 # CHECK: ldpc $2, 123456
219219
0xec 0x7e 0xff 0xff # CHECK: auipc $3, -1
220220
0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
221-
0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
221+
0xec 0x80 0x00 0x19 # CHECK: lapc $4, 100
222222
0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
223223
0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
224224
0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20

‎llvm/test/MC/Mips/micromips32r6/invalid.s

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,10 @@
3838
# FIXME: This ought to point at the $34 but memory is treated as one operand.
3939
swe $5, 8($34) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
4040
swe $5, 512($4) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
41+
lapc $7, 1048576 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
42+
lapc $6, -1048580 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
43+
lapc $3, 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
44+
lapc $3, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
4145
lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
4246
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
4347
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range

‎llvm/test/MC/Mips/micromips32r6/relocations.s

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,10 @@
1111
# CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
1212
# CHECK-FIXUP: # fixup A - offset: 0,
1313
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
14-
# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
14+
# CHECK-FIXUP: lapc $2, bar # encoding: [0x78,0b01000AAA,A,A]
15+
# CHECK-FIXUP: # fixup A - offset: 0,
16+
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
17+
# CHECK-FIXUP: lapc $2, bar # encoding: [0x78,0b01000AAA,A,A]
1518
# CHECK-FIXUP: # fixup A - offset: 0,
1619
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
1720
# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
@@ -31,13 +34,15 @@
3134
# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
3235
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
3336
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
34-
# CHECK-ELF: 0x10 R_MICROMIPS_PC21_S1 bar 0x0
37+
# CHECK-ELF: 0x10 R_MICROMIPS_PC19_S2 bar 0x0
3538
# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
39+
# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0
3640
# CHECK-ELF: ]
3741

3842
balc bar
3943
bc bar
4044
addiupc $2,bar
45+
lapc $2,bar
4146
lwpc $2,bar
4247
beqzc $3, bar
4348
bnezc $3, bar

‎llvm/test/MC/Mips/micromips32r6/valid.s

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
add $3, $4, $5 # CHECK: add $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x10]
55
addiu $3, $4, 1234 # CHECK: addiu $3, $4, 1234 # encoding: [0x30,0x64,0x04,0xd2]
66
addu $3, $4, $5 # CHECK: addu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x50]
7-
addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0x78,0x80,0x00,0x19]
7+
addiupc $4, 100 # CHECK: lapc $4, 100 # encoding: [0x78,0x80,0x00,0x19]
88
addiur1sp $7, 4 # CHECK: addiur1sp $7, 4 # encoding: [0x6f,0x83]
99
addiur2 $6, $7, -1 # CHECK: addiur2 $6, $7, -1 # encoding: [0x6f,0x7e]
1010
addiur2 $6, $7, 12 # CHECK: addiur2 $6, $7, 12 # encoding: [0x6f,0x76]
@@ -63,6 +63,9 @@
6363
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xa0,0x05,0x01,0x00]
6464
jrc16 $9 # CHECK: jrc16 $9 # encoding: [0x45,0x23]
6565
jrcaddiusp 20 # CHECK: jrcaddiusp 20 # encoding: [0x44,0xb3]
66+
lapc $4, 100 # CHECK: lapc $4, 100 # encoding: [0x78,0x80,0x00,0x19]
67+
lapc $7, 1048572 # CHECK: lapc $7, 1048572 # encoding: [0x78,0xe3,0xff,0xff]
68+
lapc $7, -1048576 # CHECK: lapc $7, -1048576 # encoding: [0x78,0xe4,0x00,0x00]
6669
lh $2, 8($4) # CHECK: lh $2, 8($4) # encoding: [0x3c,0x44,0x00,0x08]
6770
lhe $4, 8($2) # CHECK: lhe $4, 8($2) # encoding: [0x60,0x82,0x6a,0x08]
6871
lhu $4, 8($2) # CHECK: lhu $4, 8($2) # encoding: [0x34,0x82,0x00,0x08]

‎llvm/test/MC/Mips/micromips64r6/relocations.s

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,10 @@
1111
# CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
1212
# CHECK-FIXUP: # fixup A - offset: 0,
1313
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
14-
# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
14+
# CHECK-FIXUP: lapc $2, bar # encoding: [0x78,0b01000AAA,A,A]
15+
# CHECK-FIXUP: # fixup A - offset: 0,
16+
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
17+
# CHECK-FIXUP: lapc $2, bar # encoding: [0x78,0b01000AAA,A,A]
1518
# CHECK-FIXUP: # fixup A - offset: 0,
1619
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
1720
# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
@@ -34,14 +37,16 @@
3437
# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
3538
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
3639
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
37-
# CHECK-ELF: 0x10 R_MICROMIPS_PC18_S3 bar 0x0
38-
# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
40+
# CHECK-ELF: 0x10 R_MICROMIPS_PC19_S2 bar 0x0
41+
# CHECK-ELF: 0x14 R_MICROMIPS_PC18_S3 bar 0x0
3942
# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0
43+
# CHECK-ELF: 0x1C R_MICROMIPS_PC21_S1 bar 0x0
4044
# CHECK-ELF: ]
4145

4246
balc bar
4347
bc bar
4448
addiupc $2,bar
49+
lapc $2,bar
4550
lwpc $2,bar
4651
ldpc $2, bar
4752
beqzc $3, bar

‎llvm/test/MC/Mips/mips32r6/invalid.s

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -123,6 +123,10 @@ local_label:
123123
evp 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
124124
jalr.hb $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
125125
jalr.hb $31, $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
126+
lapc $7, 1048576 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
127+
lapc $6, -1048580 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
128+
lapc $3, 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
129+
lapc $3, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
126130
ldc2 $20, -1025($s2) # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
127131
ldc2 $20, 1024($s2) # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
128132
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4

‎llvm/test/MC/Mips/mips32r6/relocations.s

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
#------------------------------------------------------------------------------
66
# Check that the assembler can handle the documented syntax for fixups.
77
#------------------------------------------------------------------------------
8-
# CHECK-FIXUP: addiupc $2, bar # encoding: [0xec,0b01000AAA,A,A]
8+
# CHECK-FIXUP: lapc $2, bar # encoding: [0xec,0b01000AAA,A,A]
99
# CHECK-FIXUP: # fixup A - offset: 0,
1010
# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
1111
# CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
@@ -34,6 +34,9 @@
3434
# CHECK-FIXUP: # fixup A - offset: 0,
3535
# CHECK-FIXUP: value: %pcrel_lo(bar),
3636
# CHECK-FIXUP: kind: fixup_MIPS_PCLO16
37+
# CHECK-FIXUP: lapc $2, bar # encoding: [0xec,0b01000AAA,A,A]
38+
# CHECK-FIXUP: # fixup A - offset: 0,
39+
# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
3740
# CHECK-FIXUP: lwpc $2, bar # encoding: [0xec,0b01001AAA,A,A]
3841
# CHECK-FIXUP: # fixup A - offset: 0,
3942
# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
@@ -55,6 +58,7 @@
5558
# CHECK-ELF: 0x20 R_MIPS_PCLO16 bar 0x0
5659
# CHECK-ELF: 0x24 R_MIPS_PC19_S2 bar 0x0
5760
# CHECK-ELF: 0x28 R_MIPS_PC19_S2 bar 0x0
61+
# CHECK-ELF: 0x2C R_MIPS_PC19_S2 bar 0x0
5862
# CHECK-ELF: ]
5963

6064
addiupc $2,bar
@@ -66,5 +70,6 @@
6670
bc bar
6771
aluipc $2, %pcrel_hi(bar)
6872
addiu $2, $2, %pcrel_lo(bar)
73+
lapc $2,bar
6974
lwpc $2,bar
7075
lwupc $2,bar

‎llvm/test/MC/Mips/mips32r6/valid.s

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ a:
1616
.set noat
1717
# FIXME: Add the instructions carried forward from older ISA's
1818
and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04]
19-
addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
19+
addiupc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
2020
addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a]
2121
align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0]
2222
aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38]
@@ -113,6 +113,7 @@ a:
113113
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00]
114114
l.s $f2, 8($3) # CHECK: lwc1 $f2, 8($3) # encoding: [0xc4,0x62,0x00,0x08]
115115
l.d $f2, 8($3) # CHECK: ldc1 $f2, 8($3) # encoding: [0xd4,0x62,0x00,0x08]
116+
lapc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
116117
lsa $2, $3, $4, 3 # CHECK: lsa $2, $3, $4, 3 # encoding: [0x00,0x64,0x10,0x85]
117118
lwpc $2,268 # CHECK: lwpc $2, 268 # encoding: [0xec,0x48,0x00,0x43]
118119
lwupc $2,268 # CHECK: lwupc $2, 268 # encoding: [0xec,0x50,0x00,0x43]

‎llvm/test/MC/Mips/mips64r6/invalid.s

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -137,6 +137,10 @@ local_label:
137137
evp 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
138138
jalr.hb $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
139139
jalr.hb $31, $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
140+
lapc $7, 1048576 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
141+
lapc $6, -1048580 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
142+
lapc $3, 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
143+
lapc $3, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
140144
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4
141145
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4
142146
pref -1, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate

‎llvm/test/MC/Mips/mips64r6/relocations.s

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
#------------------------------------------------------------------------------
66
# Check that the assembler can handle the documented syntax for fixups.
77
#------------------------------------------------------------------------------
8-
# CHECK-FIXUP: addiupc $2, bar # encoding: [0xec,0b01000AAA,A,A]
8+
# CHECK-FIXUP: lapc $2, bar # encoding: [0xec,0b01000AAA,A,A]
99
# CHECK-FIXUP: # fixup A - offset: 0,
1010
# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
1111
# CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
@@ -34,6 +34,9 @@
3434
# CHECK-FIXUP: # fixup A - offset: 0,
3535
# CHECK-FIXUP: value: %pcrel_lo(bar),
3636
# CHECK-FIXUP: kind: fixup_MIPS_PCLO16
37+
# CHECK-FIXUP: lapc $2, bar # encoding: [0xec,0b01000AAA,A,A]
38+
# CHECK-FIXUP: # fixup A - offset: 0,
39+
# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
3740
# CHECK-FIXUP: ldpc $2, bar # encoding: [0xec,0b010110AA,A,A]
3841
# CHECK-FIXUP: # fixup A - offset: 0,
3942
# CHECK-FIXUP: value: bar,
@@ -57,9 +60,10 @@
5760
# CHECK-ELF: 0x18 R_MIPS_PC26_S2/R_MIPS_NONE/R_MIPS_NONE bar 0xFFFFFFFFFFFFFFFC
5861
# CHECK-ELF: 0x1C R_MIPS_PCHI16/R_MIPS_NONE/R_MIPS_NONE bar 0x0
5962
# CHECK-ELF: 0x20 R_MIPS_PCLO16/R_MIPS_NONE/R_MIPS_NONE bar 0x0
60-
# CHECK-ELF: 0x24 R_MIPS_PC18_S3/R_MIPS_NONE/R_MIPS_NONE bar 0x0
61-
# CHECK-ELF: 0x28 R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
63+
# CHECK-ELF: 0x24 R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
64+
# CHECK-ELF: 0x28 R_MIPS_PC18_S3/R_MIPS_NONE/R_MIPS_NONE bar 0x0
6265
# CHECK-ELF: 0x2C R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
66+
# CHECK-ELF: 0x30 R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
6367
# CHECK-ELF: ]
6468

6569
addiupc $2,bar
@@ -71,6 +75,7 @@
7175
bc bar
7276
aluipc $2, %pcrel_hi(bar)
7377
addiu $2, $2, %pcrel_lo(bar)
78+
lapc $2,bar
7479
ldpc $2,bar
7580
lwpc $2,bar
7681
lwupc $2,bar

‎llvm/test/MC/Mips/mips64r6/valid.s

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
a:
1616
.set noat
1717
# FIXME: Add the instructions carried forward from older ISA's
18-
addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
18+
addiupc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
1919
addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a]
2020
align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0]
2121
aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38]
@@ -158,6 +158,7 @@ a:
158158
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00]
159159
l.s $f2, 8($3) # CHECK: lwc1 $f2, 8($3) # encoding: [0xc4,0x62,0x00,0x08]
160160
l.d $f2, 8($3) # CHECK: ldc1 $f2, 8($3) # encoding: [0xd4,0x62,0x00,0x08]
161+
lapc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
161162
ldc2 $8, -701($at) # CHECK: ldc2 $8, -701($1) # encoding: [0x49,0xc8,0x0d,0x43]
162163
ldpc $2,123456 # CHECK: ldpc $2, 123456 # encoding: [0xec,0x58,0x3c,0x48]
163164
ll $v0,-153($s2) # CHECK: ll $2, -153($18) # encoding: [0x7e,0x42,0xb3,0xb6]

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