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chih-hungchih-hung
committedApr 18, 2017
[X86] Keep EXTRACT_VECTOR_ELT result type as f128 for Android x86_64.
Android x86_64 target uses f128 type and stores f128 values in %xmm* registers. SoftenFloatRes_EXTRACT_VECTOR_ELT should not convert result value from f128 to i128. Differential Revision: http://reviews.llvm.org/D32102 llvm-svn: 300583
·
llvmorg-21-initllvmorg-5.0.0-rc1
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+65
-3
lines changed

4 files changed

+65
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‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

+5-2
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
7272
case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
7373
case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
7474
case ISD::EXTRACT_VECTOR_ELT:
75-
R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N); break;
75+
R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
7676
case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
7777
case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
7878
case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
@@ -171,7 +171,10 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
171171
}
172172
}
173173

174-
SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
174+
SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175+
// When LegalInHWReg, keep the extracted value in register.
176+
if (isLegalInHWReg(N->getValueType(ResNo)))
177+
return SDValue(N, ResNo);
175178
SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
176179
return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
177180
NewOp.getValueType().getVectorElementType(),

‎llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
428428
SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo);
429429
SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
430430
SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo);
431-
SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
431+
SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
432432
SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo);
433433
SDValue SoftenFloatRes_FMINNUM(SDNode *N);
434434
SDValue SoftenFloatRes_FMAXNUM(SDNode *N);

‎llvm/test/CodeGen/X86/extract-store.ll

+37
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,10 @@
55
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE41-X64
66
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=AVX-X32
77
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX-X64
8+
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking \
9+
; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
10+
; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking \
11+
; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
812

913
define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind {
1014
; SSE2-X32-LABEL: extract_i8_0:
@@ -458,6 +462,26 @@ define void @extract_f64_1(double* nocapture %dst, <2 x double> %foo) nounwind {
458462
ret void
459463
}
460464

465+
define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
466+
; SSE-F128-LABEL: extract_f128_0:
467+
; SSE-F128: # BB#0:
468+
; SSE-F128-NEXT: movaps %xmm0, (%rdi)
469+
; SSE-F128-NEXT: retq
470+
%vecext = extractelement <2 x fp128> %foo, i32 0
471+
store fp128 %vecext, fp128* %dst, align 1
472+
ret void
473+
}
474+
475+
define void @extract_f128_1(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
476+
; SSE-F128-LABEL: extract_f128_1:
477+
; SSE-F128: # BB#0:
478+
; SSE-F128-NEXT: movaps %xmm1, (%rdi)
479+
; SSE-F128-NEXT: retq
480+
%vecext = extractelement <2 x fp128> %foo, i32 1
481+
store fp128 %vecext, fp128* %dst, align 1
482+
ret void
483+
}
484+
461485
define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) nounwind {
462486
; X32-LABEL: extract_i8_undef:
463487
; X32: # BB#0:
@@ -535,3 +559,16 @@ define void @extract_f64_undef(double* nocapture %dst, <2 x double> %foo) nounwi
535559
store double %vecext, double* %dst, align 1
536560
ret void
537561
}
562+
563+
define void @extract_f128_undef(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
564+
; X32-LABEL: extract_f128_undef:
565+
; X32: # BB#0:
566+
; X32-NEXT: retl
567+
;
568+
; X64-LABEL: extract_f128_undef:
569+
; X64: # BB#0:
570+
; X64-NEXT: retq
571+
%vecext = extractelement <2 x fp128> %foo, i32 2 ; undef
572+
store fp128 %vecext, fp128* %dst, align 1
573+
ret void
574+
}

‎llvm/test/CodeGen/X86/fp128-extract.ll

+22
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
2+
; RUN: -enable-legalize-types-checking | FileCheck %s
3+
; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
4+
; RUN: -enable-legalize-types-checking | FileCheck %s
5+
6+
; Test the softened result of extractelement op code.
7+
define fp128 @TestExtract(<2 x double> %x) {
8+
entry:
9+
; Simplified instruction pattern from the output of llvm before r289042,
10+
; for a boost function ...::insert<...>::traverse<...>().
11+
%a = fpext <2 x double> %x to <2 x fp128>
12+
%0 = extractelement <2 x fp128> %a, i32 0
13+
%1 = extractelement <2 x fp128> %a, i32 1
14+
%2 = fmul fp128 %0, %1
15+
ret fp128 %2
16+
; CHECK-LABEL: TestExtract:
17+
; CHECK: movaps %xmm0, (%rsp)
18+
; CHECK: callq __extenddftf2
19+
; CHECK: callq __extenddftf2
20+
; CHECK: callq __multf3
21+
; CHECK: retq
22+
}

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