[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)

deadalnix · deadalnix · commit 1d466f598e91 · 2017-02-06T14:28:39.000Z
Summary: This is extracted from D29443 . Reviewers: mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29564 llvm-svn: 294186
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1834,6 +1834,12 @@ SDValue DAGCombiner::visitADDLike(SDValue N0, SDValue N1, SDNode *LocReference)
     }
   }
 
+  // (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)
+  if (N1.getOpcode() == ISD::ADDE && N1->hasOneUse() &&
+      isNullConstant(N1.getOperand(1)))
+    return DAG.getNode(ISD::ADDE, DL, DAG.getVTList(VT, MVT::Glue),
+                       N0, N1->getOperand(0), N1->getOperand(2));
+
   return SDValue();
 }
 
diff --git a/llvm/test/CodeGen/X86/adde-carry.ll b/llvm/test/CodeGen/X86/adde-carry.ll
@@ -93,17 +93,16 @@ define %scalar @pr31719(%scalar* nocapture readonly %this, %scalar %arg.b) {
 ; CHECK-NEXT:    sbbq %r10, %r10
 ; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 8(%rsi), %rcx
-; CHECK-NEXT:    sbbq %r11, %r11
-; CHECK-NEXT:    andl $1, %r11d
-; CHECK-NEXT:    addq %r10, %rcx
-; CHECK-NEXT:    adcq $0, %r11
-; CHECK-NEXT:    addq 16(%rsi), %r8
 ; CHECK-NEXT:    sbbq %rax, %rax
 ; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    addq %r11, %r8
+; CHECK-NEXT:    addq %r10, %rcx
 ; CHECK-NEXT:    adcq $0, %rax
+; CHECK-NEXT:    addq 16(%rsi), %r8
+; CHECK-NEXT:    sbbq %r10, %r10
+; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 24(%rsi), %r9
-; CHECK-NEXT:    addq %rax, %r9
+; CHECK-NEXT:    addq %rax, %r8
+; CHECK-NEXT:    adcq %r10, %r9
 ; CHECK-NEXT:    movq %rdx, (%rdi)
 ; CHECK-NEXT:    movq %rcx, 8(%rdi)
 ; CHECK-NEXT:    movq %r8, 16(%rdi)

Original file line number	Diff line number	Diff line change
`@@ -1834,6 +1834,12 @@ SDValue DAGCombiner::visitADDLike(SDValue N0, SDValue N1, SDNode *LocReference)`
`1834`	`1834`	`}`
`1835`	`1835`	`}`
`1836`	`1836`
	`1837`	`+ // (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)`
	`1838`	`+ if (N1.getOpcode() == ISD::ADDE && N1->hasOneUse() &&`
	`1839`	`+ isNullConstant(N1.getOperand(1)))`
	`1840`	`+ return DAG.getNode(ISD::ADDE, DL, DAG.getVTList(VT, MVT::Glue),`
	`1841`	`+ N0, N1->getOperand(0), N1->getOperand(2));`
	`1842`	`+`
`1837`	`1843`	`return SDValue();`
`1838`	`1844`	`}`
`1839`	`1845`