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committedFeb 1, 2017
[ImplicitNullCheck] NFC isSuitableMemoryOp cleanup
Summary: isSuitableMemoryOp method is repsonsible for verification that instruction is a candidate to use in implicit null check. Additionally it checks that base register is not re-defined before. In case base has been re-defined it just returns false and lookup is continued while any suitable instruction will not succeed this check as well. This results in redundant further operations. So when we found that base register has been re-defined we just stop. Patch by Serguei Katkov! Reviewers: reames, sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29119 llvm-svn: 293736
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‎llvm/lib/CodeGen/ImplicitNullChecks.cpp

+23-13
Original file line numberDiff line numberDiff line change
@@ -158,11 +158,16 @@ class ImplicitNullChecks : public MachineFunctionPass {
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MachineBasicBlock *HandlerMBB);
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void rewriteNullChecks(ArrayRef<NullCheck> NullCheckList);
160160

161-
/// Is \p MI a memory operation that can be used to implicitly null check the
162-
/// value in \p PointerReg? \p PrevInsts is the set of instruction seen since
161+
enum SuitabilityResult { SR_Suitable, SR_Unsuitable, SR_Impossible };
162+
163+
/// Return SR_Suitable if \p MI a memory operation that can be used to
164+
/// implicitly null check the value in \p PointerReg, SR_Unsuitable if
165+
/// \p MI cannot be used to null check and SR_Impossible if there is
166+
/// no sense to continue lookup due to any other instruction will not be able
167+
/// to be used. \p PrevInsts is the set of instruction seen since
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/// the explicit null check on \p PointerReg.
164-
bool isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
165-
ArrayRef<MachineInstr *> PrevInsts);
169+
SuitabilityResult isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
170+
ArrayRef<MachineInstr *> PrevInsts);
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167172
/// Return true if \p FaultingMI can be hoisted from after the the
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/// instructions in \p InstsSeenSoFar to before them. Set \p Dependence to a
@@ -283,30 +288,33 @@ static bool AnyAliasLiveIn(const TargetRegisterInfo *TRI,
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return false;
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}
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286-
bool ImplicitNullChecks::isSuitableMemoryOp(
287-
MachineInstr &MI, unsigned PointerReg, ArrayRef<MachineInstr *> PrevInsts) {
291+
ImplicitNullChecks::SuitabilityResult
292+
ImplicitNullChecks::isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
293+
ArrayRef<MachineInstr *> PrevInsts) {
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int64_t Offset;
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unsigned BaseReg;
290296

291297
if (!TII->getMemOpBaseRegImmOfs(MI, BaseReg, Offset, TRI) ||
292298
BaseReg != PointerReg)
293-
return false;
299+
return SR_Unsuitable;
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295301
// We want the load to be issued at a sane offset from PointerReg, so that
296302
// if PointerReg is null then the load reliably page faults.
297303
if (!(MI.mayLoad() && !MI.isPredicable() && Offset < PageSize))
298-
return false;
304+
return SR_Unsuitable;
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300306
// Finally, we need to make sure that the load instruction actually is
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// loading from PointerReg, and there isn't some re-definition of PointerReg
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// between the compare and the load.
309+
// If PointerReg has been redefined before then there is no sense to continue
310+
// lookup due to this condition will fail for any further instruction.
303311
for (auto *PrevMI : PrevInsts)
304312
for (auto &PrevMO : PrevMI->operands())
305313
if (PrevMO.isReg() && PrevMO.getReg() &&
306314
TRI->regsOverlap(PrevMO.getReg(), PointerReg))
307-
return false;
315+
return SR_Impossible;
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309-
return true;
317+
return SR_Suitable;
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}
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312320
bool ImplicitNullChecks::canHoistLoadInst(
@@ -481,9 +489,11 @@ bool ImplicitNullChecks::analyzeBlockForNullChecks(
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return false;
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483491
MachineInstr *Dependence;
484-
if (isSuitableMemoryOp(MI, PointerReg, InstsSeenSoFar) &&
485-
canHoistLoadInst(&MI, PointerReg, InstsSeenSoFar, NullSucc,
486-
Dependence)) {
492+
SuitabilityResult SR = isSuitableMemoryOp(MI, PointerReg, InstsSeenSoFar);
493+
if (SR == SR_Impossible)
494+
return false;
495+
if (SR == SR_Suitable && canHoistLoadInst(&MI, PointerReg, InstsSeenSoFar,
496+
NullSucc, Dependence)) {
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NullCheckList.emplace_back(&MI, MBP.ConditionDef, &MBB, NotNullSucc,
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NullSucc, Dependence);
489499
return true;

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