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author
Justin Lebar
committedJul 14, 2016
[CodeGen] Refactor MachineMemOperand's Flags enum.
Summary: - Give it a shorter name (because we're going to refer to it often from SelectionDAG and friends). - Split the flags and alignment into separate variables. - Specialize FlagsEnumTraits for it, so we can do bitwise ops on it without losing type information. - Make some enum values constants in MachineMemOperand instead. MOMaxBits should not be a valid Flag. - Simplify some of the bitwise ops for dealing with Flags. Reviewers: chandlerc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22281 llvm-svn: 275438
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‎llvm/include/llvm/CodeGen/MachineMemOperand.h

+35-22
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H
1717
#define LLVM_CODEGEN_MACHINEMEMOPERAND_H
1818

19+
#include "llvm/ADT/BitmaskEnum.h"
1920
#include "llvm/ADT/PointerUnion.h"
2021
#include "llvm/CodeGen/PseudoSourceValue.h"
2122
#include "llvm/IR/Metadata.h"
@@ -87,15 +88,18 @@ struct MachinePointerInfo {
8788
/// that aren't explicit in the regular LLVM IR.
8889
///
8990
class MachineMemOperand {
90-
MachinePointerInfo PtrInfo;
91-
uint64_t Size;
92-
unsigned Flags;
93-
AAMDNodes AAInfo;
94-
const MDNode *Ranges;
95-
9691
public:
92+
// This is the number of bits we need to represent flags.
93+
static constexpr unsigned MOMaxBits = 8;
94+
95+
// Target hints allow target passes to annotate memory operations.
96+
static constexpr unsigned MOTargetStartBit = 5;
97+
static constexpr unsigned MOTargetNumBits = 3;
98+
9799
/// Flags values. These may be or'd together.
98-
enum MemOperandFlags {
100+
enum Flags : uint16_t {
101+
// No flags set.
102+
MONone = 0,
99103
/// The memory access reads data.
100104
MOLoad = 1,
101105
/// The memory access writes data.
@@ -106,16 +110,25 @@ class MachineMemOperand {
106110
MONonTemporal = 8,
107111
/// The memory access is invariant.
108112
MOInvariant = 16,
109-
// Target hints allow target passes to annotate memory operations.
110-
MOTargetStartBit = 5,
111-
MOTargetNumBits = 3,
112-
// This is the number of bits we need to represent flags.
113-
MOMaxBits = 8
113+
114+
// Maximum MemOperandFlag value (inclusive).
115+
MOMaxFlag = (1 << MOMaxBits) - 1,
116+
117+
LLVM_MARK_AS_BITMASK_ENUM(MOMaxFlag)
114118
};
115119

120+
private:
121+
MachinePointerInfo PtrInfo;
122+
uint64_t Size;
123+
Flags FlagVals;
124+
uint16_t BaseAlignLog2; // log_2(base_alignment) + 1
125+
AAMDNodes AAInfo;
126+
const MDNode *Ranges;
127+
128+
public:
116129
/// Construct a MachineMemOperand object with the specified PtrInfo, flags,
117130
/// size, and base alignment.
118-
MachineMemOperand(MachinePointerInfo PtrInfo, unsigned flags, uint64_t s,
131+
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s,
119132
unsigned base_alignment,
120133
const AAMDNodes &AAInfo = AAMDNodes(),
121134
const MDNode *Ranges = nullptr);
@@ -137,11 +150,11 @@ class MachineMemOperand {
137150

138151
const void *getOpaqueValue() const { return PtrInfo.V.getOpaqueValue(); }
139152

140-
/// Return the raw flags of the source value, \see MemOperandFlags.
141-
unsigned int getFlags() const { return Flags & ((1 << MOMaxBits) - 1); }
153+
/// Return the raw flags of the source value, \see Flags.
154+
Flags getFlags() const { return FlagVals; }
142155

143156
/// Bitwise OR the current flags with the given flags.
144-
void setFlags(unsigned f) { Flags |= (f & ((1 << MOMaxBits) - 1)); }
157+
void setFlags(Flags f) { FlagVals |= f; }
145158

146159
/// For normal values, this is a byte offset added to the base address.
147160
/// For PseudoSourceValue::FPRel values, this is the FrameIndex number.
@@ -158,19 +171,19 @@ class MachineMemOperand {
158171

159172
/// Return the minimum known alignment in bytes of the base address, without
160173
/// the offset.
161-
uint64_t getBaseAlignment() const { return (1u << (Flags >> MOMaxBits)) >> 1; }
174+
uint64_t getBaseAlignment() const { return (1u << BaseAlignLog2) >> 1; }
162175

163176
/// Return the AA tags for the memory reference.
164177
AAMDNodes getAAInfo() const { return AAInfo; }
165178

166179
/// Return the range tag for the memory reference.
167180
const MDNode *getRanges() const { return Ranges; }
168181

169-
bool isLoad() const { return Flags & MOLoad; }
170-
bool isStore() const { return Flags & MOStore; }
171-
bool isVolatile() const { return Flags & MOVolatile; }
172-
bool isNonTemporal() const { return Flags & MONonTemporal; }
173-
bool isInvariant() const { return Flags & MOInvariant; }
182+
bool isLoad() const { return FlagVals & MOLoad; }
183+
bool isStore() const { return FlagVals & MOStore; }
184+
bool isVolatile() const { return FlagVals & MOVolatile; }
185+
bool isNonTemporal() const { return FlagVals & MONonTemporal; }
186+
bool isInvariant() const { return FlagVals & MOInvariant; }
174187

175188
/// Returns true if this memory operation doesn't have any ordering
176189
/// constraints other than normal aliasing. Volatile and atomic memory

‎llvm/lib/CodeGen/MachineFunction.cpp

+5-2
Original file line numberDiff line numberDiff line change
@@ -299,8 +299,11 @@ MachineFunction::getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f,
299299
uint64_t s, unsigned base_alignment,
300300
const AAMDNodes &AAInfo,
301301
const MDNode *Ranges) {
302-
return new (Allocator) MachineMemOperand(PtrInfo, f, s, base_alignment,
303-
AAInfo, Ranges);
302+
// FIXME: Get rid of this static_cast and make getMachineOperand take a
303+
// MachineMemOperand::Flags param.
304+
return new (Allocator)
305+
MachineMemOperand(PtrInfo, static_cast<MachineMemOperand::Flags>(f), s,
306+
base_alignment, AAInfo, Ranges);
304307
}
305308

306309
MachineMemOperand *

‎llvm/lib/CodeGen/MachineInstr.cpp

+8-7
Original file line numberDiff line numberDiff line change
@@ -497,13 +497,14 @@ MachinePointerInfo MachinePointerInfo::getStack(MachineFunction &MF,
497497
return MachinePointerInfo(MF.getPSVManager().getStack(), Offset);
498498
}
499499

500-
MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, unsigned f,
500+
MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
501501
uint64_t s, unsigned int a,
502502
const AAMDNodes &AAInfo,
503503
const MDNode *Ranges)
504-
: PtrInfo(ptrinfo), Size(s),
505-
Flags((f & ((1 << MOMaxBits) - 1)) | ((Log2_32(a) + 1) << MOMaxBits)),
506-
AAInfo(AAInfo), Ranges(Ranges) {
504+
: PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlignLog2(Log2_32(a) + 1),
505+
AAInfo(AAInfo), Ranges(Ranges) {
506+
assert(MOMaxFlag == (1 << MOMaxBits) - 1 &&
507+
"MOMaxFlag and MOMaxBits have fallen out of sync.");
507508
assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue*>() ||
508509
isa<PointerType>(PtrInfo.V.get<const Value*>()->getType())) &&
509510
"invalid pointer value");
@@ -517,7 +518,8 @@ void MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
517518
ID.AddInteger(getOffset());
518519
ID.AddInteger(Size);
519520
ID.AddPointer(getOpaqueValue());
520-
ID.AddInteger(Flags);
521+
ID.AddInteger(getFlags());
522+
ID.AddInteger(getBaseAlignment());
521523
}
522524

523525
void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) {
@@ -528,8 +530,7 @@ void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) {
528530

529531
if (MMO->getBaseAlignment() >= getBaseAlignment()) {
530532
// Update the alignment value.
531-
Flags = (Flags & ((1 << MOMaxBits) - 1)) |
532-
((Log2_32(MMO->getBaseAlignment()) + 1) << MOMaxBits);
533+
BaseAlignLog2 = Log2_32(MMO->getBaseAlignment()) + 1;
533534
// Also update the base and offset, because the new alignment may
534535
// not be applicable with the old ones.
535536
PtrInfo = MMO->PtrInfo;

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -1468,7 +1468,8 @@ void AArch64InstrInfo::suppressLdStPair(MachineInstr &MI) const {
14681468
static_assert(MOSuppressPair < (1 << MachineMemOperand::MOTargetNumBits),
14691469
"Too many target MO flags");
14701470
(*MI.memoperands_begin())
1471-
->setFlags(MOSuppressPair << MachineMemOperand::MOTargetStartBit);
1471+
->setFlags(static_cast<MachineMemOperand::Flags>(
1472+
MOSuppressPair << MachineMemOperand::MOTargetStartBit));
14721473
}
14731474

14741475
bool AArch64InstrInfo::isUnscaledLdSt(unsigned Opc) const {

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