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committedMay 13, 2016
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
Reviewers: tstellard Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D19785 llvm-svn: 269473
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‎llvm/lib/Target/AMDGPU/AMDGPU.h

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Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ namespace AMDGPUAS {
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enum AddressSpaces : unsigned {
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PRIVATE_ADDRESS = 0, ///< Address space for private memory.
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GLOBAL_ADDRESS = 1, ///< Address space for global memory (RAT0, VTX0).
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CONSTANT_ADDRESS = 2, ///< Address space for constant memory
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CONSTANT_ADDRESS = 2, ///< Address space for constant memory (VTX2)
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LOCAL_ADDRESS = 3, ///< Address space for local memory.
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FLAT_ADDRESS = 4, ///< Address space for flat memory.
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REGION_ADDRESS = 5, ///< Address space for region memory.

‎llvm/lib/Target/AMDGPU/CaymanInstructions.td

+26
Original file line numberDiff line numberDiff line change
@@ -206,6 +206,7 @@ def VTX_READ_GLOBAL_8_cm : VTX_READ_8_cm <1,
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[(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
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>;
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// 16-bit reads
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def VTX_READ_GLOBAL_16_cm : VTX_READ_16_cm <1,
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[(set i32:$dst_gpr, (az_extloadi16_global ADDRVTX_READ:$src_gpr))]
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>;
@@ -225,5 +226,30 @@ def VTX_READ_GLOBAL_128_cm : VTX_READ_128_cm <1,
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[(set v4i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
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>;
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// 8-bit reads
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def VTX_READ_CONSTANT_8_cm : VTX_READ_8_cm <2,
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[(set i32:$dst_gpr, (az_extloadi8_constant ADDRVTX_READ:$src_gpr))]
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>;
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// 16-bit reads
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def VTX_READ_CONSTANT_16_cm : VTX_READ_16_cm <2,
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[(set i32:$dst_gpr, (az_extloadi16_constant ADDRVTX_READ:$src_gpr))]
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>;
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// 32-bit reads
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def VTX_READ_CONSTANT_32_cm : VTX_READ_32_cm <2,
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[(set i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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// 64-bit reads
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def VTX_READ_CONSTANT_64_cm : VTX_READ_64_cm <2,
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[(set v2i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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// 128-bit reads
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def VTX_READ_CONSTANT_128_cm : VTX_READ_128_cm <2,
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[(set v4i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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} // End isCayman
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‎llvm/lib/Target/AMDGPU/EvergreenInstructions.td

+26
Original file line numberDiff line numberDiff line change
@@ -239,6 +239,7 @@ def VTX_READ_GLOBAL_8_eg : VTX_READ_8_eg <1,
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[(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
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>;
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// 16-bit reads
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def VTX_READ_GLOBAL_16_eg : VTX_READ_16_eg <1,
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[(set i32:$dst_gpr, (az_extloadi16_global ADDRVTX_READ:$src_gpr))]
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>;
@@ -258,6 +259,31 @@ def VTX_READ_GLOBAL_128_eg : VTX_READ_128_eg <1,
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[(set v4i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
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>;
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// 8-bit reads
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def VTX_READ_CONSTANT_8_eg : VTX_READ_8_eg <2,
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[(set i32:$dst_gpr, (az_extloadi8_constant ADDRVTX_READ:$src_gpr))]
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>;
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// 16-bit reads
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def VTX_READ_CONSTANT_16_eg : VTX_READ_16_eg <2,
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[(set i32:$dst_gpr, (az_extloadi16_constant ADDRVTX_READ:$src_gpr))]
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>;
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// 32-bit reads
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def VTX_READ_CONSTANT_32_eg : VTX_READ_32_eg <2,
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[(set i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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// 64-bit reads
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def VTX_READ_CONSTANT_64_eg : VTX_READ_64_eg <2,
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[(set v2i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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// 128-bit reads
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def VTX_READ_CONSTANT_128_eg : VTX_READ_128_eg <2,
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[(set v4i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
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>;
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} // End Predicates = [isEG]
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//===----------------------------------------------------------------------===//

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