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committedDec 19, 2015
AMDGPU/SI: Fix implemenation of isSourceOfDivergence() for graphics shaders
Summary: The analysis of shader inputs was completely wrong. We were passing the wrong index to AttributeSet::hasAttribute() and the logic for which inputs where in SGPRs was wrong too. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15608 llvm-svn: 256082
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‎llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp

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@@ -141,14 +141,13 @@ static bool isArgPassedInSGPR(const Argument *A) {
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if (ShaderType == ShaderType::COMPUTE)
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return true;
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// For non-compute shaders, the inreg attribute is used to mark inputs,
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// which pre-loaded into SGPRs.
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if (F->getAttributes().hasAttribute(A->getArgNo(), Attribute::InReg))
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// For non-compute shaders, SGPR inputs are marked with either inreg or byval.
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if (F->getAttributes().hasAttribute(A->getArgNo() + 1, Attribute::InReg) ||
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F->getAttributes().hasAttribute(A->getArgNo() + 1, Attribute::ByVal))
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return true;
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// For non-compute shaders, 32-bit values are pre-loaded into vgprs, all
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// other value types use SGPRS.
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return !A->getType()->isIntegerTy(32) && !A->getType()->isFloatTy();
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// Everything else is in VGPRs.
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return false;
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}
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///
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@@ -0,0 +1,16 @@
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; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s
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; CHECK: DIVERGENT:
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; CHECK-NOT: %arg0
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; CHECK-NOT: %arg1
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; CHECK-NOT; %arg2
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; CHECK: <2 x i32> %arg3
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; CHECK: DIVERGENT: <3 x i32> %arg4
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; CHECK: DIVERGENT: float %arg5
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; CHECK: DIVERGENT: i32 %arg6
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define void @main([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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attributes #0 = { "ShaderType"="0" }
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@@ -0,0 +1,2 @@
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if not 'AMDGPU' in config.root.targets:
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config.unsupported = True

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