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RKSimonRKSimon
committedNov 28, 2015
[X86][FMA] Added 512-bit tests to match 128/256-bit tests coverage
As discussed on D14909 llvm-svn: 254233
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‎llvm/test/CodeGen/X86/fma_patterns_wide.ll

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@@ -251,3 +251,490 @@ define <8 x double> @test_8f64_fmsub_load(<8 x double>* %a0, <8 x double> %a1, <
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%res = fsub <8 x double> %y, %a2
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ret <8 x double> %res
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}
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;
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; Patterns (+ fneg variants): mul(add(1.0,x),y), mul(sub(1.0,x),y), mul(sub(x,1.0),y)
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;
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define <16 x float> @test_v16f32_mul_add_x_one_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_add_x_one_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmadd213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_add_x_one_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmaddps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_add_x_one_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmadd213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%a = fadd <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
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%m = fmul <16 x float> %a, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_add_x_one(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_add_x_one:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmadd213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_add_x_one:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmaddpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_add_x_one:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmadd213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%a = fadd <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>
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%m = fmul <8 x double> %y, %a
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ret <8 x double> %m
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}
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define <16 x float> @test_v16f32_mul_add_x_negone_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_add_x_negone_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfmsub213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmsub213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_add_x_negone_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmsubps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmsubps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_add_x_negone_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmsub213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%a = fadd <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>
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%m = fmul <16 x float> %a, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_add_x_negone(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_add_x_negone:
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; FMA: # BB#0:
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; FMA-NEXT: vfmsub213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmsub213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_add_x_negone:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmsubpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmsubpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_add_x_negone:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmsub213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%a = fadd <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>
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%m = fmul <8 x double> %y, %a
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ret <8 x double> %m
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}
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define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_sub_one_x_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfnmadd213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfnmadd213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_sub_one_x_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfnmaddps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfnmaddps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_sub_one_x_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfnmadd213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
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%m = fmul <16 x float> %s, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_sub_one_x:
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; FMA: # BB#0:
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; FMA-NEXT: vfnmadd213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfnmadd213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_sub_one_x:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfnmaddpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfnmaddpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_sub_one_x:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfnmadd213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %x
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%m = fmul <8 x double> %y, %s
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ret <8 x double> %m
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}
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define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_sub_negone_x_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfnmsub213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfnmsub213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_sub_negone_x_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfnmsubps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfnmsubps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_sub_negone_x_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfnmsub213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <16 x float> <float -1.0, float -1.0, float -1.0, float -1.0,float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>, %x
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%m = fmul <16 x float> %s, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_sub_negone_x:
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; FMA: # BB#0:
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; FMA-NEXT: vfnmsub213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfnmsub213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_sub_negone_x:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfnmsubpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfnmsubpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_sub_negone_x:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfnmsub213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <8 x double> <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>, %x
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%m = fmul <8 x double> %y, %s
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ret <8 x double> %m
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}
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define <16 x float> @test_v16f32_mul_sub_x_one_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_sub_x_one_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfmsub213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmsub213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_sub_x_one_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmsubps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmsubps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_sub_x_one_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmsub213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
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%m = fmul <16 x float> %s, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_sub_x_one(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_sub_x_one:
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; FMA: # BB#0:
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; FMA-NEXT: vfmsub213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmsub213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_sub_x_one:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmsubpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmsubpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_sub_x_one:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmsub213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>
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%m = fmul <8 x double> %y, %s
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ret <8 x double> %m
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}
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define <16 x float> @test_v16f32_mul_sub_x_negone_y(<16 x float> %x, <16 x float> %y) {
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; FMA-LABEL: test_v16f32_mul_sub_x_negone_y:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd213ps %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmadd213ps %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_mul_sub_x_negone_y:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddps %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmaddps %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_mul_sub_x_negone_y:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmadd213ps %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>
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%m = fmul <16 x float> %s, %y
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ret <16 x float> %m
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}
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define <8 x double> @test_v8f64_mul_y_sub_x_negone(<8 x double> %x, <8 x double> %y) {
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; FMA-LABEL: test_v8f64_mul_y_sub_x_negone:
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; FMA: # BB#0:
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; FMA-NEXT: vfmadd213pd %ymm2, %ymm2, %ymm0
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; FMA-NEXT: vfmadd213pd %ymm3, %ymm3, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v8f64_mul_y_sub_x_negone:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfmaddpd %ymm2, %ymm2, %ymm0, %ymm0
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; FMA4-NEXT: vfmaddpd %ymm3, %ymm3, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v8f64_mul_y_sub_x_negone:
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; AVX512: # BB#0:
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; AVX512-NEXT: vfmadd213pd %zmm1, %zmm1, %zmm0
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; AVX512-NEXT: retq
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%s = fsub <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>
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%m = fmul <8 x double> %y, %s
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ret <8 x double> %m
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}
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;
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; Interpolation Patterns: add(mul(x,t),mul(sub(1.0,t),y))
525+
;
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define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x float> %t) {
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; FMA-LABEL: test_v16f32_interp:
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; FMA: # BB#0:
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; FMA-NEXT: vfnmadd213ps %ymm3, %ymm5, %ymm3
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; FMA-NEXT: vfnmadd213ps %ymm2, %ymm4, %ymm2
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; FMA-NEXT: vfmadd213ps %ymm2, %ymm4, %ymm0
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; FMA-NEXT: vfmadd213ps %ymm3, %ymm5, %ymm1
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; FMA-NEXT: retq
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;
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; FMA4-LABEL: test_v16f32_interp:
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; FMA4: # BB#0:
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; FMA4-NEXT: vfnmaddps %ymm3, %ymm3, %ymm5, %ymm3
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; FMA4-NEXT: vfnmaddps %ymm2, %ymm2, %ymm4, %ymm2
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; FMA4-NEXT: vfmaddps %ymm2, %ymm4, %ymm0, %ymm0
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; FMA4-NEXT: vfmaddps %ymm3, %ymm5, %ymm1, %ymm1
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; FMA4-NEXT: retq
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;
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; AVX512-LABEL: test_v16f32_interp:
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; AVX512: # BB#0:
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; AVX512-NEXT: vmovaps %zmm2, %zmm3
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; AVX512-NEXT: vfnmadd213ps %zmm1, %zmm1, %zmm3
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; AVX512-NEXT: vfmadd213ps %zmm3, %zmm2, %zmm0
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; AVX512-NEXT: retq
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%t1 = fsub <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t
551+
%tx = fmul <16 x float> %x, %t
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%ty = fmul <16 x float> %y, %t1
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%r = fadd <16 x float> %tx, %ty
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ret <16 x float> %r
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}
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define <8 x double> @test_v8f64_interp(<8 x double> %x, <8 x double> %y, <8 x double> %t) {
558+
; FMA-LABEL: test_v8f64_interp:
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; FMA: # BB#0:
560+
; FMA-NEXT: vfnmadd213pd %ymm3, %ymm5, %ymm3
561+
; FMA-NEXT: vfnmadd213pd %ymm2, %ymm4, %ymm2
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; FMA-NEXT: vfmadd213pd %ymm2, %ymm4, %ymm0
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; FMA-NEXT: vfmadd213pd %ymm3, %ymm5, %ymm1
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; FMA-NEXT: retq
565+
;
566+
; FMA4-LABEL: test_v8f64_interp:
567+
; FMA4: # BB#0:
568+
; FMA4-NEXT: vfnmaddpd %ymm3, %ymm3, %ymm5, %ymm3
569+
; FMA4-NEXT: vfnmaddpd %ymm2, %ymm2, %ymm4, %ymm2
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; FMA4-NEXT: vfmaddpd %ymm2, %ymm4, %ymm0, %ymm0
571+
; FMA4-NEXT: vfmaddpd %ymm3, %ymm5, %ymm1, %ymm1
572+
; FMA4-NEXT: retq
573+
;
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; AVX512-LABEL: test_v8f64_interp:
575+
; AVX512: # BB#0:
576+
; AVX512-NEXT: vmovaps %zmm2, %zmm3
577+
; AVX512-NEXT: vfnmadd213pd %zmm1, %zmm1, %zmm3
578+
; AVX512-NEXT: vfmadd213pd %zmm3, %zmm2, %zmm0
579+
; AVX512-NEXT: retq
580+
%t1 = fsub <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %t
581+
%tx = fmul <8 x double> %x, %t
582+
%ty = fmul <8 x double> %y, %t1
583+
%r = fadd <8 x double> %tx, %ty
584+
ret <8 x double> %r
585+
}
586+
587+
;
588+
; Pattern: (fneg (fma x, y, z)) -> (fma x, -y, -z)
589+
;
590+
591+
define <16 x float> @test_v16f32_fneg_fmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) #0 {
592+
; FMA-LABEL: test_v16f32_fneg_fmadd:
593+
; FMA: # BB#0:
594+
; FMA-NEXT: vfnmsub213ps %ymm4, %ymm2, %ymm0
595+
; FMA-NEXT: vfnmsub213ps %ymm5, %ymm3, %ymm1
596+
; FMA-NEXT: retq
597+
;
598+
; FMA4-LABEL: test_v16f32_fneg_fmadd:
599+
; FMA4: # BB#0:
600+
; FMA4-NEXT: vfnmsubps %ymm4, %ymm2, %ymm0, %ymm0
601+
; FMA4-NEXT: vfnmsubps %ymm5, %ymm3, %ymm1, %ymm1
602+
; FMA4-NEXT: retq
603+
;
604+
; AVX512-LABEL: test_v16f32_fneg_fmadd:
605+
; AVX512: # BB#0:
606+
; AVX512-NEXT: vfnmsub213ps %zmm2, %zmm1, %zmm0
607+
; AVX512-NEXT: retq
608+
%mul = fmul <16 x float> %a0, %a1
609+
%add = fadd <16 x float> %mul, %a2
610+
%neg = fsub <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %add
611+
ret <16 x float> %neg
612+
}
613+
614+
define <8 x double> @test_v8f64_fneg_fmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) #0 {
615+
; FMA-LABEL: test_v8f64_fneg_fmsub:
616+
; FMA: # BB#0:
617+
; FMA-NEXT: vfnmadd213pd %ymm4, %ymm2, %ymm0
618+
; FMA-NEXT: vfnmadd213pd %ymm5, %ymm3, %ymm1
619+
; FMA-NEXT: retq
620+
;
621+
; FMA4-LABEL: test_v8f64_fneg_fmsub:
622+
; FMA4: # BB#0:
623+
; FMA4-NEXT: vfnmaddpd %ymm4, %ymm2, %ymm0, %ymm0
624+
; FMA4-NEXT: vfnmaddpd %ymm5, %ymm3, %ymm1, %ymm1
625+
; FMA4-NEXT: retq
626+
;
627+
; AVX512-LABEL: test_v8f64_fneg_fmsub:
628+
; AVX512: # BB#0:
629+
; AVX512-NEXT: vfnmadd213pd %zmm2, %zmm1, %zmm0
630+
; AVX512-NEXT: retq
631+
%mul = fmul <8 x double> %a0, %a1
632+
%sub = fsub <8 x double> %mul, %a2
633+
%neg = fsub <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %sub
634+
ret <8 x double> %neg
635+
}
636+
637+
define <16 x float> @test_v16f32_fneg_fnmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) #0 {
638+
; FMA-LABEL: test_v16f32_fneg_fnmadd:
639+
; FMA: # BB#0:
640+
; FMA-NEXT: vfmsub213ps %ymm4, %ymm2, %ymm0
641+
; FMA-NEXT: vfmsub213ps %ymm5, %ymm3, %ymm1
642+
; FMA-NEXT: retq
643+
;
644+
; FMA4-LABEL: test_v16f32_fneg_fnmadd:
645+
; FMA4: # BB#0:
646+
; FMA4-NEXT: vfmsubps %ymm4, %ymm2, %ymm0, %ymm0
647+
; FMA4-NEXT: vfmsubps %ymm5, %ymm3, %ymm1, %ymm1
648+
; FMA4-NEXT: retq
649+
;
650+
; AVX512-LABEL: test_v16f32_fneg_fnmadd:
651+
; AVX512: # BB#0:
652+
; AVX512-NEXT: vfmsub213ps %zmm2, %zmm1, %zmm0
653+
; AVX512-NEXT: retq
654+
%mul = fmul <16 x float> %a0, %a1
655+
%neg0 = fsub <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %mul
656+
%add = fadd <16 x float> %neg0, %a2
657+
%neg1 = fsub <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %add
658+
ret <16 x float> %neg1
659+
}
660+
661+
define <8 x double> @test_v8f64_fneg_fnmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) #0 {
662+
; FMA-LABEL: test_v8f64_fneg_fnmsub:
663+
; FMA: # BB#0:
664+
; FMA-NEXT: vfmadd213pd %ymm4, %ymm2, %ymm0
665+
; FMA-NEXT: vfmadd213pd %ymm5, %ymm3, %ymm1
666+
; FMA-NEXT: retq
667+
;
668+
; FMA4-LABEL: test_v8f64_fneg_fnmsub:
669+
; FMA4: # BB#0:
670+
; FMA4-NEXT: vfmaddpd %ymm4, %ymm2, %ymm0, %ymm0
671+
; FMA4-NEXT: vfmaddpd %ymm5, %ymm3, %ymm1, %ymm1
672+
; FMA4-NEXT: retq
673+
;
674+
; AVX512-LABEL: test_v8f64_fneg_fnmsub:
675+
; AVX512: # BB#0:
676+
; AVX512-NEXT: vfmadd213pd %zmm2, %zmm1, %zmm0
677+
; AVX512-NEXT: retq
678+
%mul = fmul <8 x double> %a0, %a1
679+
%neg0 = fsub <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %mul
680+
%sub = fsub <8 x double> %neg0, %a2
681+
%neg1 = fsub <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %sub
682+
ret <8 x double> %neg1
683+
}
684+
685+
;
686+
; Pattern: (fma x, c1, (fmul x, c2)) -> (fmul x, c1+c2)
687+
;
688+
689+
define <16 x float> @test_v16f32_fma_x_c1_fmul_x_c2(<16 x float> %x) #0 {
690+
; FMA-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:
691+
; FMA: # BB#0:
692+
; FMA-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0
693+
; FMA-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1
694+
; FMA-NEXT: retq
695+
;
696+
; FMA4-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:
697+
; FMA4: # BB#0:
698+
; FMA4-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0
699+
; FMA4-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1
700+
; FMA4-NEXT: retq
701+
;
702+
; AVX512-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:
703+
; AVX512: # BB#0:
704+
; AVX512-NEXT: vmulps {{.*}}(%rip), %zmm0, %zmm0
705+
; AVX512-NEXT: retq
706+
%m0 = fmul <16 x float> %x, <float 17.0, float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0>
707+
%m1 = fmul <16 x float> %x, <float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0, float 1.0>
708+
%a = fadd <16 x float> %m0, %m1
709+
ret <16 x float> %a
710+
}
711+
712+
;
713+
; Pattern: (fma (fmul x, c1), c2, y) -> (fma x, c1*c2, y)
714+
;
715+
716+
define <16 x float> @test_v16f32_fma_fmul_x_c1_c2_y(<16 x float> %x, <16 x float> %y) #0 {
717+
; FMA-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:
718+
; FMA: # BB#0:
719+
; FMA-NEXT: vfmadd132ps {{.*}}(%rip), %ymm2, %ymm0
720+
; FMA-NEXT: vfmadd132ps {{.*}}(%rip), %ymm3, %ymm1
721+
; FMA-NEXT: retq
722+
;
723+
; FMA4-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:
724+
; FMA4: # BB#0:
725+
; FMA4-NEXT: vfmaddps %ymm2, {{.*}}(%rip), %ymm0, %ymm0
726+
; FMA4-NEXT: vfmaddps %ymm3, {{.*}}(%rip), %ymm1, %ymm1
727+
; FMA4-NEXT: retq
728+
;
729+
; AVX512-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:
730+
; AVX512: # BB#0:
731+
; AVX512-NEXT: vfmadd231ps {{.*}}(%rip), %zmm0, %zmm1
732+
; AVX512-NEXT: vmovaps %zmm1, %zmm0
733+
; AVX512-NEXT: retq
734+
%m0 = fmul <16 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0>
735+
%m1 = fmul <16 x float> %m0, <float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0, float 1.0>
736+
%a = fadd <16 x float> %m1, %y
737+
ret <16 x float> %a
738+
}
739+
740+
attributes #0 = { "unsafe-fp-math"="true" }

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