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[SROA] Don't de-atomic volatile loads and stores
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Volatile loads and stores are made visible in global state regardless of
what memory is involved.  It is not correct to disregard the ordering
and synchronization scope because it is possible to synchronize with
memory operations performed by hardware.

This partially addresses PR23737.

llvm-svn: 242126
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majnemer committed Jul 14, 2015
1 parent 4ca1903 commit 62690b1
Showing 2 changed files with 26 additions and 6 deletions.
21 changes: 15 additions & 6 deletions llvm/lib/Transforms/Scalar/SROA.cpp
Original file line number Diff line number Diff line change
@@ -2593,13 +2593,21 @@ class AllocaSliceRewriter : public InstVisitor<AllocaSliceRewriter, bool> {
V = rewriteIntegerLoad(LI);
} else if (NewBeginOffset == NewAllocaBeginOffset &&
canConvertValue(DL, NewAllocaTy, LI.getType())) {
V = IRB.CreateAlignedLoad(&NewAI, NewAI.getAlignment(), LI.isVolatile(),
LI.getName());
LoadInst *NewLI = IRB.CreateAlignedLoad(&NewAI, NewAI.getAlignment(),
LI.isVolatile(), LI.getName());
if (LI.isVolatile())
NewLI->setAtomic(LI.getOrdering(), LI.getSynchScope());

V = NewLI;
} else {
Type *LTy = TargetTy->getPointerTo();
V = IRB.CreateAlignedLoad(getNewAllocaSlicePtr(IRB, LTy),
getSliceAlign(TargetTy), LI.isVolatile(),
LI.getName());
LoadInst *NewLI = IRB.CreateAlignedLoad(getNewAllocaSlicePtr(IRB, LTy),
getSliceAlign(TargetTy),
LI.isVolatile(), LI.getName());
if (LI.isVolatile())
NewLI->setAtomic(LI.getOrdering(), LI.getSynchScope());

V = NewLI;
IsPtrAdjusted = true;
}
V = convertValue(DL, IRB, V, TargetTy);
@@ -2722,7 +2730,8 @@ class AllocaSliceRewriter : public InstVisitor<AllocaSliceRewriter, bool> {
NewSI = IRB.CreateAlignedStore(V, NewPtr, getSliceAlign(V->getType()),
SI.isVolatile());
}
(void)NewSI;
if (SI.isVolatile())
NewSI->setAtomic(SI.getOrdering(), SI.getSynchScope());
Pass.DeadInsts.insert(&SI);
deleteIfTriviallyDead(OldOp);

11 changes: 11 additions & 0 deletions llvm/test/Transforms/SROA/basictest.ll
Original file line number Diff line number Diff line change
@@ -1595,3 +1595,14 @@ entry:
store i32 %load, i32* %a.gep1
ret void
}

define void @PR23737() {
; CHECK-LABEL: @PR23737(
; CHECK: store atomic volatile {{.*}} seq_cst
; CHECK: load atomic volatile {{.*}} seq_cst
entry:
%ptr = alloca i64, align 8
store atomic volatile i64 0, i64* %ptr seq_cst, align 8
%load = load atomic volatile i64, i64* %ptr seq_cst, align 8
ret void
}

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