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Commit f3721bf

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committedJan 6, 2015
SelectionDAGBuilder: move constant initialization out of loop
No semantic change intended. Reviewers: resistor Differential Revision: http://reviews.llvm.org/D6834 llvm-svn: 225278
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‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

+19-15
Original file line numberDiff line numberDiff line change
@@ -1238,33 +1238,37 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
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unsigned NumValues = ValueVTs.size();
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if (NumValues) {
12401240
SDValue RetOp = getValue(I.getOperand(0));
1241-
for (unsigned j = 0, f = NumValues; j != f; ++j) {
1242-
EVT VT = ValueVTs[j];
12431241

1244-
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1242+
const Function *F = I.getParent()->getParent();
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1246-
const Function *F = I.getParent()->getParent();
1247-
if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1248-
Attribute::SExt))
1249-
ExtendKind = ISD::SIGN_EXTEND;
1250-
else if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1251-
Attribute::ZExt))
1252-
ExtendKind = ISD::ZERO_EXTEND;
1244+
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1245+
if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1246+
Attribute::SExt))
1247+
ExtendKind = ISD::SIGN_EXTEND;
1248+
else if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1249+
Attribute::ZExt))
1250+
ExtendKind = ISD::ZERO_EXTEND;
1251+
1252+
LLVMContext &Context = F->getContext();
1253+
bool RetInReg = F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1254+
Attribute::InReg);
1255+
1256+
for (unsigned j = 0; j != NumValues; ++j) {
1257+
EVT VT = ValueVTs[j];
12531258

12541259
if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
1255-
VT = TLI.getTypeForExtArgOrReturn(*DAG.getContext(), VT, ExtendKind);
1260+
VT = TLI.getTypeForExtArgOrReturn(Context, VT, ExtendKind);
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1257-
unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), VT);
1258-
MVT PartVT = TLI.getRegisterType(*DAG.getContext(), VT);
1262+
unsigned NumParts = TLI.getNumRegisters(Context, VT);
1263+
MVT PartVT = TLI.getRegisterType(Context, VT);
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SmallVector<SDValue, 4> Parts(NumParts);
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getCopyToParts(DAG, getCurSDLoc(),
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SDValue(RetOp.getNode(), RetOp.getResNo() + j),
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&Parts[0], NumParts, PartVT, &I, ExtendKind);
12631268

12641269
// 'inreg' on function refers to return value
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ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1266-
if (F->getAttributes().hasAttribute(AttributeSet::ReturnIndex,
1267-
Attribute::InReg))
1271+
if (RetInReg)
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Flags.setInReg();
12691273

12701274
// Propagate extension type if any

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