@@ -479,3 +479,483 @@ define i32 @nabs_nabs_x16(i32 %x) {
479
479
; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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; CHECK-NEXT: ret i32 [[SEL]]
481
481
}
482
+
483
+ define i32 @abs_nabs_x01 (i32 %x ) {
484
+ %cmp = icmp sgt i32 %x , -1
485
+ %sub = sub nsw i32 0 , %x
486
+ %cond = select i1 %cmp , i32 %sub , i32 %x
487
+ %cmp1 = icmp sgt i32 %cond , -1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
491
+ ; CHECK-LABEL: @abs_nabs_x01(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
498
+ define i32 @abs_nabs_x02 (i32 %x ) {
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+ %cmp = icmp sgt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp sgt i32 %cond , -1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
506
+ ; CHECK-LABEL: @abs_nabs_x02(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
513
+ define i32 @abs_nabs_x03 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp sgt i32 %cond , -1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
521
+ ; CHECK-LABEL: @abs_nabs_x03(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
528
+ define i32 @abs_nabs_x04 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 1
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+ %sub = sub nsw i32 0 , %x
531
+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp sgt i32 %cond , -1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @abs_nabs_x04(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
541
+ }
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+
543
+ define i32 @abs_nabs_x05 (i32 %x ) {
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+ %cmp = icmp sgt i32 %x , -1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp sgt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @abs_nabs_x05(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
556
+ }
557
+
558
+ define i32 @abs_nabs_x06 (i32 %x ) {
559
+ %cmp = icmp sgt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp sgt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
565
+ ret i32 %cond18
566
+ ; CHECK-LABEL: @abs_nabs_x06(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
569
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
571
+ }
572
+
573
+ define i32 @abs_nabs_x07 (i32 %x ) {
574
+ %cmp = icmp slt i32 %x , 0
575
+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
577
+ %cmp1 = icmp sgt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
579
+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
580
+ ret i32 %cond18
581
+ ; CHECK-LABEL: @abs_nabs_x07(
582
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
583
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
584
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
586
+ }
587
+
588
+ define i32 @abs_nabs_x08 (i32 %x ) {
589
+ %cmp = icmp slt i32 %x , 1
590
+ %sub = sub nsw i32 0 , %x
591
+ %cond = select i1 %cmp , i32 %x , i32 %sub
592
+ %cmp1 = icmp sgt i32 %cond , 0
593
+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
595
+ ret i32 %cond18
596
+ ; CHECK-LABEL: @abs_nabs_x08(
597
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
598
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
601
+ }
602
+
603
+ define i32 @abs_nabs_x09 (i32 %x ) {
604
+ %cmp = icmp sgt i32 %x , -1
605
+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 0
608
+ %sub9 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
610
+ ret i32 %cond18
611
+ ; CHECK-LABEL: @abs_nabs_x09(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
615
+ ; CHECK-NEXT: ret i32 [[SEL]]
616
+ }
617
+
618
+ define i32 @abs_nabs_x10 (i32 %x ) {
619
+ %cmp = icmp sgt i32 %x , 0
620
+ %sub = sub nsw i32 0 , %x
621
+ %cond = select i1 %cmp , i32 %sub , i32 %x
622
+ %cmp1 = icmp slt i32 %cond , 0
623
+ %sub9 = sub nsw i32 0 , %cond
624
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
625
+ ret i32 %cond18
626
+ ; CHECK-LABEL: @abs_nabs_x10(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
628
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
629
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
630
+ ; CHECK-NEXT: ret i32 [[SEL]]
631
+ }
632
+
633
+ define i32 @abs_nabs_x11 (i32 %x ) {
634
+ %cmp = icmp slt i32 %x , 0
635
+ %sub = sub nsw i32 0 , %x
636
+ %cond = select i1 %cmp , i32 %x , i32 %sub
637
+ %cmp1 = icmp slt i32 %cond , 0
638
+ %sub9 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
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+ ret i32 %cond18
641
+ ; CHECK-LABEL: @abs_nabs_x11(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
646
+ }
647
+
648
+ define i32 @abs_nabs_x12 (i32 %x ) {
649
+ %cmp = icmp slt i32 %x , 1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp slt i32 %cond , 0
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+ %sub9 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
655
+ ret i32 %cond18
656
+ ; CHECK-LABEL: @abs_nabs_x12(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
661
+ }
662
+
663
+ define i32 @abs_nabs_x13 (i32 %x ) {
664
+ %cmp = icmp sgt i32 %x , -1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub9 = sub nsw i32 0 , %cond
669
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
670
+ ret i32 %cond18
671
+ ; CHECK-LABEL: @abs_nabs_x13(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
673
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
675
+ ; CHECK-NEXT: ret i32 [[SEL]]
676
+ }
677
+
678
+ define i32 @abs_nabs_x14 (i32 %x ) {
679
+ %cmp = icmp sgt i32 %x , 0
680
+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
682
+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub9 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
685
+ ret i32 %cond18
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+ ; CHECK-LABEL: @abs_nabs_x14(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
688
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
689
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
690
+ ; CHECK-NEXT: ret i32 [[SEL]]
691
+ }
692
+
693
+ define i32 @abs_nabs_x15 (i32 %x ) {
694
+ %cmp = icmp slt i32 %x , 0
695
+ %sub = sub nsw i32 0 , %x
696
+ %cond = select i1 %cmp , i32 %x , i32 %sub
697
+ %cmp1 = icmp slt i32 %cond , 1
698
+ %sub9 = sub nsw i32 0 , %cond
699
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
700
+ ret i32 %cond18
701
+ ; CHECK-LABEL: @abs_nabs_x15(
702
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
703
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
704
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
705
+ ; CHECK-NEXT: ret i32 [[SEL]]
706
+ }
707
+
708
+ define i32 @abs_nabs_x16 (i32 %x ) {
709
+ %cmp = icmp slt i32 %x , 1
710
+ %sub = sub nsw i32 0 , %x
711
+ %cond = select i1 %cmp , i32 %x , i32 %sub
712
+ %cmp1 = icmp slt i32 %cond , 1
713
+ %sub9 = sub nsw i32 0 , %cond
714
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
715
+ ret i32 %cond18
716
+ ; CHECK-LABEL: @abs_nabs_x16(
717
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
718
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
719
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
720
+ ; CHECK-NEXT: ret i32 [[SEL]]
721
+ }
722
+
723
+ define i32 @nabs_abs_x01 (i32 %x ) {
724
+ %cmp = icmp sgt i32 %x , -1
725
+ %sub = sub nsw i32 0 , %x
726
+ %cond = select i1 %cmp , i32 %x , i32 %sub
727
+ %cmp1 = icmp sgt i32 %cond , -1
728
+ %sub9 = sub nsw i32 0 , %cond
729
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
730
+ ret i32 %cond18
731
+ ; CHECK-LABEL: @nabs_abs_x01(
732
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
733
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
734
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
735
+ ; CHECK-NEXT: ret i32 [[SEL]]
736
+ }
737
+
738
+ define i32 @nabs_abs_x02 (i32 %x ) {
739
+ %cmp = icmp sgt i32 %x , 0
740
+ %sub = sub nsw i32 0 , %x
741
+ %cond = select i1 %cmp , i32 %x , i32 %sub
742
+ %cmp1 = icmp sgt i32 %cond , -1
743
+ %sub9 = sub nsw i32 0 , %cond
744
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
745
+ ret i32 %cond18
746
+ ; CHECK-LABEL: @nabs_abs_x02(
747
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
748
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
749
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
750
+ ; CHECK-NEXT: ret i32 [[SEL]]
751
+ }
752
+
753
+ define i32 @nabs_abs_x03 (i32 %x ) {
754
+ %cmp = icmp slt i32 %x , 0
755
+ %sub = sub nsw i32 0 , %x
756
+ %cond = select i1 %cmp , i32 %sub , i32 %x
757
+ %cmp1 = icmp sgt i32 %cond , -1
758
+ %sub9 = sub nsw i32 0 , %cond
759
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
760
+ ret i32 %cond18
761
+ ; CHECK-LABEL: @nabs_abs_x03(
762
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
763
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
764
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
765
+ ; CHECK-NEXT: ret i32 [[SEL]]
766
+ }
767
+
768
+ define i32 @nabs_abs_x04 (i32 %x ) {
769
+ %cmp = icmp slt i32 %x , 1
770
+ %sub = sub nsw i32 0 , %x
771
+ %cond = select i1 %cmp , i32 %sub , i32 %x
772
+ %cmp1 = icmp sgt i32 %cond , -1
773
+ %sub9 = sub nsw i32 0 , %cond
774
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
775
+ ret i32 %cond18
776
+ ; CHECK-LABEL: @nabs_abs_x04(
777
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
778
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
779
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
780
+ ; CHECK-NEXT: ret i32 [[SEL]]
781
+ }
782
+
783
+ define i32 @nabs_abs_x05 (i32 %x ) {
784
+ %cmp = icmp sgt i32 %x , -1
785
+ %sub = sub nsw i32 0 , %x
786
+ %cond = select i1 %cmp , i32 %x , i32 %sub
787
+ %cmp1 = icmp sgt i32 %cond , 0
788
+ %sub9 = sub nsw i32 0 , %cond
789
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
790
+ ret i32 %cond18
791
+ ; CHECK-LABEL: @nabs_abs_x05(
792
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
793
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
794
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
795
+ ; CHECK-NEXT: ret i32 [[SEL]]
796
+ }
797
+
798
+ define i32 @nabs_abs_x06 (i32 %x ) {
799
+ %cmp = icmp sgt i32 %x , 0
800
+ %sub = sub nsw i32 0 , %x
801
+ %cond = select i1 %cmp , i32 %x , i32 %sub
802
+ %cmp1 = icmp sgt i32 %cond , 0
803
+ %sub9 = sub nsw i32 0 , %cond
804
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
805
+ ret i32 %cond18
806
+ ; CHECK-LABEL: @nabs_abs_x06(
807
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
808
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
809
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
810
+ ; CHECK-NEXT: ret i32 [[SEL]]
811
+ }
812
+
813
+ define i32 @nabs_abs_x07 (i32 %x ) {
814
+ %cmp = icmp slt i32 %x , 0
815
+ %sub = sub nsw i32 0 , %x
816
+ %cond = select i1 %cmp , i32 %sub , i32 %x
817
+ %cmp1 = icmp sgt i32 %cond , 0
818
+ %sub9 = sub nsw i32 0 , %cond
819
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
820
+ ret i32 %cond18
821
+ ; CHECK-LABEL: @nabs_abs_x07(
822
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
823
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
824
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
825
+ ; CHECK-NEXT: ret i32 [[SEL]]
826
+ }
827
+
828
+ define i32 @nabs_abs_x08 (i32 %x ) {
829
+ %cmp = icmp slt i32 %x , 1
830
+ %sub = sub nsw i32 0 , %x
831
+ %cond = select i1 %cmp , i32 %sub , i32 %x
832
+ %cmp1 = icmp sgt i32 %cond , 0
833
+ %sub9 = sub nsw i32 0 , %cond
834
+ %cond18 = select i1 %cmp1 , i32 %sub9 , i32 %cond
835
+ ret i32 %cond18
836
+ ; CHECK-LABEL: @nabs_abs_x08(
837
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
838
+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
839
+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
840
+ ; CHECK-NEXT: ret i32 [[SEL]]
841
+ }
842
+
843
+ define i32 @nabs_abs_x09 (i32 %x ) {
844
+ %cmp = icmp sgt i32 %x , -1
845
+ %sub = sub nsw i32 0 , %x
846
+ %cond = select i1 %cmp , i32 %x , i32 %sub
847
+ %cmp1 = icmp slt i32 %cond , 0
848
+ %sub16 = sub nsw i32 0 , %cond
849
+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
850
+ ret i32 %cond18
851
+ ; CHECK-LABEL: @nabs_abs_x09(
852
+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x10 (i32 %x ) {
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+ %cmp = icmp sgt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp slt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x10(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x11 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x11(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x12 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 0
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x12(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x13 (i32 %x ) {
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+ %cmp = icmp sgt i32 %x , -1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x13(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x14 (i32 %x ) {
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+ %cmp = icmp sgt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %x , i32 %sub
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+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x14(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x15 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 0
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x15(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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+
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+ define i32 @nabs_abs_x16 (i32 %x ) {
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+ %cmp = icmp slt i32 %x , 1
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+ %sub = sub nsw i32 0 , %x
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+ %cond = select i1 %cmp , i32 %sub , i32 %x
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+ %cmp1 = icmp slt i32 %cond , 1
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+ %sub16 = sub nsw i32 0 , %cond
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+ %cond18 = select i1 %cmp1 , i32 %cond , i32 %sub16
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+ ret i32 %cond18
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+ ; CHECK-LABEL: @nabs_abs_x16(
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+ ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
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+ ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
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+ ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
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+ ; CHECK-NEXT: ret i32 [[SEL]]
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+ }
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