[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
Patch [3/5] in a series to add assembler/disassembler support for AArch64 SVE unpredicated ADD/SUB instructions.
To summarise, this patch adds:
- SVE register definitions
- Methods to parse SVE register operands
- Methods to print SVE register operands
- RegKind SVEDataVector to distinguish it from other data types like scalar register or Neon vector.
- k_SVEDataRegister and SVEDataRegOp to describe SVE registers (which will be extended by further patches with e.g. ElementWidth and the shift-extend type).
Patch by Sander De Smalen.
Reviewed by: rengolin
Differential Revision: https://reviews.llvm.org/D39089