Skip to content

Commit 67533a2

Browse files
rui314rui314
committedOct 11, 2017
Define RelType to represent relocation types.
We were using uint32_t as the type of relocation kind. It has a readability issue because what Type really means in `uint32_t Type` is not obvious. It could be a section type, a symbol type or a relocation type. Since we do not do any arithemetic operations on relocation types (e.g. adding one to R_X86_64_PC32 doesn't make sense), it would be more natural if they are represented as enums. Unfortunately, that is not doable because relocation type definitions are spread into multiple header files. So I decided to use typedef. This still should be better than the plain uint32_t because the intended type is now obvious. llvm-svn: 315525
1 parent 66060cf commit 67533a2

17 files changed

+194
-193
lines changed
 

‎lld/ELF/Arch/AArch64.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -32,20 +32,20 @@ namespace {
3232
class AArch64 final : public TargetInfo {
3333
public:
3434
AArch64();
35-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
35+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
3636
const uint8_t *Loc) const override;
37-
bool isPicRel(uint32_t Type) const override;
37+
bool isPicRel(RelType Type) const override;
3838
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
3939
void writePltHeader(uint8_t *Buf) const override;
4040
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
4141
int32_t Index, unsigned RelOff) const override;
42-
bool usesOnlyLowPageBits(uint32_t Type) const override;
43-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
44-
RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
42+
bool usesOnlyLowPageBits(RelType Type) const override;
43+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
44+
RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
4545
RelExpr Expr) const override;
46-
void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
47-
void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
48-
void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
46+
void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
47+
void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
48+
void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
4949
};
5050
} // namespace
5151

@@ -68,7 +68,7 @@ AArch64::AArch64() {
6868
TcbSize = 16;
6969
}
7070

71-
RelExpr AArch64::getRelExpr(uint32_t Type, const SymbolBody &S,
71+
RelExpr AArch64::getRelExpr(RelType Type, const SymbolBody &S,
7272
const InputFile &File, const uint8_t *Loc) const {
7373
switch (Type) {
7474
default:
@@ -107,7 +107,7 @@ RelExpr AArch64::getRelExpr(uint32_t Type, const SymbolBody &S,
107107
}
108108
}
109109

110-
RelExpr AArch64::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
110+
RelExpr AArch64::adjustRelaxExpr(RelType Type, const uint8_t *Data,
111111
RelExpr Expr) const {
112112
if (Expr == R_RELAX_TLS_GD_TO_IE) {
113113
if (Type == R_AARCH64_TLSDESC_ADR_PAGE21)
@@ -117,7 +117,7 @@ RelExpr AArch64::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
117117
return Expr;
118118
}
119119

120-
bool AArch64::usesOnlyLowPageBits(uint32_t Type) const {
120+
bool AArch64::usesOnlyLowPageBits(RelType Type) const {
121121
switch (Type) {
122122
default:
123123
return false;
@@ -135,7 +135,7 @@ bool AArch64::usesOnlyLowPageBits(uint32_t Type) const {
135135
}
136136
}
137137

138-
bool AArch64::isPicRel(uint32_t Type) const {
138+
bool AArch64::isPicRel(RelType Type) const {
139139
return Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64;
140140
}
141141

@@ -202,7 +202,7 @@ static void or32AArch64Imm(uint8_t *L, uint64_t Imm) {
202202
or32le(L, (Imm & 0xFFF) << 10);
203203
}
204204

205-
void AArch64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
205+
void AArch64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
206206
switch (Type) {
207207
case R_AARCH64_ABS16:
208208
case R_AARCH64_PREL16:
@@ -307,7 +307,7 @@ void AArch64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
307307
}
308308
}
309309

310-
void AArch64::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
310+
void AArch64::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
311311
// TLSDESC Global-Dynamic relocation are in the form:
312312
// adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21]
313313
// ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12]
@@ -337,7 +337,7 @@ void AArch64::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
337337
}
338338
}
339339

340-
void AArch64::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
340+
void AArch64::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
341341
// TLSDESC Global-Dynamic relocation are in the form:
342342
// adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21]
343343
// ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12]
@@ -368,7 +368,7 @@ void AArch64::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
368368
}
369369
}
370370

371-
void AArch64::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
371+
void AArch64::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
372372
checkUInt<32>(Loc, Val, Type);
373373

374374
if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) {

‎lld/ELF/Arch/AMDGPU.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,8 @@ namespace {
2525
class AMDGPU final : public TargetInfo {
2626
public:
2727
AMDGPU();
28-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
29-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
28+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
29+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
3030
const uint8_t *Loc) const override;
3131
};
3232
} // namespace
@@ -37,7 +37,7 @@ AMDGPU::AMDGPU() {
3737
GotEntrySize = 8;
3838
}
3939

40-
void AMDGPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
40+
void AMDGPU::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
4141
switch (Type) {
4242
case R_AMDGPU_ABS32:
4343
case R_AMDGPU_GOTPCREL:
@@ -58,7 +58,7 @@ void AMDGPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
5858
}
5959
}
6060

61-
RelExpr AMDGPU::getRelExpr(uint32_t Type, const SymbolBody &S,
61+
RelExpr AMDGPU::getRelExpr(RelType Type, const SymbolBody &S,
6262
const InputFile &File, const uint8_t *Loc) const {
6363
switch (Type) {
6464
case R_AMDGPU_ABS32:

‎lld/ELF/Arch/ARM.cpp

Lines changed: 16 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -26,23 +26,22 @@ namespace {
2626
class ARM final : public TargetInfo {
2727
public:
2828
ARM();
29-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
29+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
3030
const uint8_t *Loc) const override;
31-
bool isPicRel(uint32_t Type) const override;
32-
uint32_t getDynRel(uint32_t Type) const override;
33-
int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
31+
bool isPicRel(RelType Type) const override;
32+
RelType getDynRel(RelType Type) const override;
33+
int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
3434
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
3535
void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
3636
void writePltHeader(uint8_t *Buf) const override;
3737
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
3838
int32_t Index, unsigned RelOff) const override;
3939
void addPltSymbols(InputSectionBase *IS, uint64_t Off) const override;
4040
void addPltHeaderSymbols(InputSectionBase *ISD) const override;
41-
bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
41+
bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
4242
const SymbolBody &S) const override;
43-
bool inBranchRange(uint32_t RelocType, uint64_t Src,
44-
uint64_t Dst) const override;
45-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
43+
bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override;
44+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
4645
};
4746
} // namespace
4847

@@ -65,7 +64,7 @@ ARM::ARM() {
6564
NeedsThunks = true;
6665
}
6766

68-
RelExpr ARM::getRelExpr(uint32_t Type, const SymbolBody &S,
67+
RelExpr ARM::getRelExpr(RelType Type, const SymbolBody &S,
6968
const InputFile &File, const uint8_t *Loc) const {
7069
switch (Type) {
7170
default:
@@ -123,12 +122,12 @@ RelExpr ARM::getRelExpr(uint32_t Type, const SymbolBody &S,
123122
}
124123
}
125124

126-
bool ARM::isPicRel(uint32_t Type) const {
125+
bool ARM::isPicRel(RelType Type) const {
127126
return (Type == R_ARM_TARGET1 && !Config->Target1Rel) ||
128127
(Type == R_ARM_ABS32);
129128
}
130129

131-
uint32_t ARM::getDynRel(uint32_t Type) const {
130+
RelType ARM::getDynRel(RelType Type) const {
132131
if (Type == R_ARM_TARGET1 && !Config->Target1Rel)
133132
return R_ARM_ABS32;
134133
if (Type == R_ARM_ABS32)
@@ -189,7 +188,7 @@ void ARM::addPltSymbols(InputSectionBase *ISD, uint64_t Off) const {
189188
addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS);
190189
}
191190

192-
bool ARM::needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
191+
bool ARM::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
193192
const SymbolBody &S) const {
194193
// If S is an undefined weak symbol in an executable we don't need a Thunk.
195194
// In a DSO calls to undefined symbols, including weak ones get PLT entries
@@ -199,7 +198,7 @@ bool ARM::needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
199198
// A state change from ARM to Thumb and vice versa must go through an
200199
// interworking thunk if the relocation type is not R_ARM_CALL or
201200
// R_ARM_THM_CALL.
202-
switch (RelocType) {
201+
switch (Type) {
203202
case R_ARM_PC24:
204203
case R_ARM_PLT32:
205204
case R_ARM_JUMP24:
@@ -219,11 +218,11 @@ bool ARM::needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
219218
return false;
220219
}
221220

222-
bool ARM::inBranchRange(uint32_t RelocType, uint64_t Src, uint64_t Dst) const {
221+
bool ARM::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
223222
uint64_t Range;
224223
uint64_t InstrSize;
225224

226-
switch (RelocType) {
225+
switch (Type) {
227226
case R_ARM_PC24:
228227
case R_ARM_PLT32:
229228
case R_ARM_JUMP24:
@@ -262,7 +261,7 @@ bool ARM::inBranchRange(uint32_t RelocType, uint64_t Src, uint64_t Dst) const {
262261
return Distance <= Range;
263262
}
264263

265-
void ARM::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
264+
void ARM::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
266265
switch (Type) {
267266
case R_ARM_ABS32:
268267
case R_ARM_BASE_PREL:
@@ -399,7 +398,7 @@ void ARM::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
399398
}
400399
}
401400

402-
int64_t ARM::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
401+
int64_t ARM::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
403402
switch (Type) {
404403
default:
405404
return 0;

‎lld/ELF/Arch/AVR.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -43,13 +43,13 @@ using namespace lld::elf;
4343
namespace {
4444
class AVR final : public TargetInfo {
4545
public:
46-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
46+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
4747
const uint8_t *Loc) const override;
48-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
48+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
4949
};
5050
} // namespace
5151

52-
RelExpr AVR::getRelExpr(uint32_t Type, const SymbolBody &S,
52+
RelExpr AVR::getRelExpr(RelType Type, const SymbolBody &S,
5353
const InputFile &File, const uint8_t *Loc) const {
5454
switch (Type) {
5555
case R_AVR_CALL:
@@ -60,7 +60,7 @@ RelExpr AVR::getRelExpr(uint32_t Type, const SymbolBody &S,
6060
}
6161
}
6262

63-
void AVR::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
63+
void AVR::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
6464
switch (Type) {
6565
case R_AVR_CALL: {
6666
uint16_t Hi = Val >> 17;

‎lld/ELF/Arch/Mips.cpp

Lines changed: 17 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -28,19 +28,19 @@ namespace {
2828
template <class ELFT> class MIPS final : public TargetInfo {
2929
public:
3030
MIPS();
31-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
31+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
3232
const uint8_t *Loc) const override;
33-
int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
34-
bool isPicRel(uint32_t Type) const override;
35-
uint32_t getDynRel(uint32_t Type) const override;
33+
int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
34+
bool isPicRel(RelType Type) const override;
35+
RelType getDynRel(RelType Type) const override;
3636
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
3737
void writePltHeader(uint8_t *Buf) const override;
3838
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
3939
int32_t Index, unsigned RelOff) const override;
40-
bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
40+
bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
4141
const SymbolBody &S) const override;
42-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
43-
bool usesOnlyLowPageBits(uint32_t Type) const override;
42+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
43+
bool usesOnlyLowPageBits(RelType Type) const override;
4444
};
4545
} // namespace
4646

@@ -70,7 +70,7 @@ template <class ELFT> MIPS<ELFT>::MIPS() {
7070
}
7171

7272
template <class ELFT>
73-
RelExpr MIPS<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
73+
RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const SymbolBody &S,
7474
const InputFile &File,
7575
const uint8_t *Loc) const {
7676
// See comment in the calculateMipsRelChain.
@@ -180,11 +180,11 @@ RelExpr MIPS<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
180180
}
181181
}
182182

183-
template <class ELFT> bool MIPS<ELFT>::isPicRel(uint32_t Type) const {
183+
template <class ELFT> bool MIPS<ELFT>::isPicRel(RelType Type) const {
184184
return Type == R_MIPS_32 || Type == R_MIPS_64;
185185
}
186186

187-
template <class ELFT> uint32_t MIPS<ELFT>::getDynRel(uint32_t Type) const {
187+
template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType Type) const {
188188
return RelativeRel;
189189
}
190190

@@ -327,7 +327,7 @@ void MIPS<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
327327
}
328328

329329
template <class ELFT>
330-
bool MIPS<ELFT>::needsThunk(RelExpr Expr, uint32_t Type, const InputFile *File,
330+
bool MIPS<ELFT>::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
331331
const SymbolBody &S) const {
332332
// Any MIPS PIC code function is invoked with its address in register $t9.
333333
// So if we have a branch instruction from non-PIC code to the PIC one
@@ -350,7 +350,7 @@ bool MIPS<ELFT>::needsThunk(RelExpr Expr, uint32_t Type, const InputFile *File,
350350
}
351351

352352
template <class ELFT>
353-
int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
353+
int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
354354
const endianness E = ELFT::TargetEndianness;
355355
switch (Type) {
356356
default:
@@ -421,7 +421,7 @@ int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
421421
}
422422

423423
static std::pair<uint32_t, uint64_t>
424-
calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
424+
calculateMipsRelChain(uint8_t *Loc, RelType Type, uint64_t Val) {
425425
// MIPS N64 ABI packs multiple relocations into the single relocation
426426
// record. In general, all up to three relocations can have arbitrary
427427
// types. In fact, Clang and GCC uses only a few combinations. For now,
@@ -434,8 +434,8 @@ calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
434434
// relocations used to modify result of the first one: extend it to
435435
// 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
436436
// at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
437-
uint32_t Type2 = (Type >> 8) & 0xff;
438-
uint32_t Type3 = (Type >> 16) & 0xff;
437+
RelType Type2 = (Type >> 8) & 0xff;
438+
RelType Type3 = (Type >> 16) & 0xff;
439439
if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
440440
return std::make_pair(Type, Val);
441441
if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
@@ -451,7 +451,7 @@ calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
451451
}
452452

453453
template <class ELFT>
454-
void MIPS<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
454+
void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
455455
const endianness E = ELFT::TargetEndianness;
456456
// Thread pointer and DRP offsets from the start of TLS data area.
457457
// https://www.linux-mips.org/wiki/NPTL
@@ -632,8 +632,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
632632
}
633633
}
634634

635-
template <class ELFT>
636-
bool MIPS<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
635+
template <class ELFT> bool MIPS<ELFT>::usesOnlyLowPageBits(RelType Type) const {
637636
return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST ||
638637
Type == R_MICROMIPS_LO16 || Type == R_MICROMIPS_GOT_OFST;
639638
}

‎lld/ELF/Arch/PPC.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22,13 +22,13 @@ namespace {
2222
class PPC final : public TargetInfo {
2323
public:
2424
PPC() { GotBaseSymOff = 0x8000; }
25-
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
26-
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
25+
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
26+
RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
2727
const uint8_t *Loc) const override;
2828
};
2929
} // namespace
3030

31-
void PPC::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
31+
void PPC::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
3232
switch (Type) {
3333
case R_PPC_ADDR16_HA:
3434
write16be(Loc, (Val + 0x8000) >> 16);
@@ -48,7 +48,7 @@ void PPC::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
4848
}
4949
}
5050

51-
RelExpr PPC::getRelExpr(uint32_t Type, const SymbolBody &S,
51+
RelExpr PPC::getRelExpr(RelType Type, const SymbolBody &S,
5252
const InputFile &File, const uint8_t *Loc) const {
5353
switch (Type) {
5454
case R_PPC_REL24:

0 commit comments

Comments
 (0)
Please sign in to comment.