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Quentin Colombet
committedApr 5, 2016
[GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register banks. llvm-svn: 265440
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‎llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h

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//== llvm/CodeGen/GlobalISel/RegBankSelect.h - Reg Bank Selector -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file describes the interface of the MachineFunctionPass
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/// responsible for assigning the generic virtual registers to register bank.
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/// By default, the reg bank selector relies on local decisions to
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/// assign the register bank. In other words, it looks at one instruction
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/// at a time to decide where the operand of that instruction should live.
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///
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/// At higher optimization level, we could imagine that the reg bank selector
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/// would use more global analysis and do crazier thing like duplicating
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/// instructions and so on. This is future work.
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///
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/// For now, the pass uses a greedy algorithm to decide where the operand
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/// of an instruction should live. It asks the target which banks may be
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/// used for each operand of the instruction and what is the cost. Then,
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/// it chooses the solution which minimize the cost of the instruction plus
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/// the cost of any move that may be needed to to the values into the right
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/// register bank.
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/// In other words, the cost for an instruction on a register bank RegBank
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/// is: Cost of I on RegBank plus the sum of the cost for bringing the
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/// input operands from their current register bank to RegBank.
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/// Thus, the following formula:
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/// cost(I, RegBank) = cost(I.Opcode, RegBank) +
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/// sum(for each arg in I.arguments: costCrossCopy(arg.RegBank, RegBank))
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///
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/// E.g., Let say we are assigning the register bank for the instruction
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/// defining v2.
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/// v0(A_REGBANK) = ...
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/// v1(A_REGBANK) = ...
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/// v2 = G_ADD i32 v0, v1 <-- MI
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///
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/// The target may say it can generate G_ADD i32 on register bank A and B
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/// with a cost of respectively 5 and 1.
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/// Then, let say the cost of a cross register bank copies from A to B is 1.
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/// The reg bank selector would compare the following two costs:
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/// cost(MI, A_REGBANK) = cost(G_ADD, A_REGBANK) + cost(v0.RegBank, A_REGBANK) +
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/// cost(v1.RegBank, A_REGBANK)
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/// = 5 + cost(A_REGBANK, A_REGBANK) + cost(A_REGBANK,
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/// A_REGBANK)
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/// = 5 + 0 + 0 = 5
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/// cost(MI, B_REGBANK) = cost(G_ADD, B_REGBANK) + cost(v0.RegBank, B_REGBANK) +
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/// cost(v1.RegBank, B_REGBANK)
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/// = 1 + cost(A_REGBANK, B_REGBANK) + cost(A_REGBANK,
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/// B_REGBANK)
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/// = 1 + 1 + 1 = 3
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/// Therefore, in this specific example, the reg bank selector would choose
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/// bank B for MI.
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/// v0(A_REGBANK) = ...
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/// v1(A_REGBANK) = ...
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/// tmp0(B_REGBANK) = COPY v0
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/// tmp1(B_REGBANK) = COPY v1
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/// v2(B_REGBANK) = G_ADD i32 tmp0, tmp1
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
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#define LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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namespace llvm {
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// Forward declarations.
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class RegisterBankInfo;
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/// This pass implements the reg bank selector pass used in the GlobalISel
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/// pipeline. At the end of this pass, all register operands have been assigned
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class RegBankSelect : public MachineFunctionPass {
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public:
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static char ID;
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private:
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/// Interface to the target lowering info related
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/// to register banks.
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const RegisterBankInfo *RBI;
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public:
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// Ctor, nothing fancy.
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RegBankSelect();
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const char *getPassName() const override {
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return "RegBankSelect";
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}
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// Simplified algo:
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// RBI = MF.subtarget.getRegBankInfo()
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// MIRBuilder.reset(MF)
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// for each bb in MF
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// for each inst in bb
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// MappingCosts = RBI.getMapping(inst);
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// Idx = findIdxOfMinCost(MappingCosts)
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// CurRegBank = MappingCosts[Idx].RegBank
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// MRI.setRegBank(inst.getOperand(0).getReg(), CurRegBank)
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// for each argument in inst
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// if (CurRegBank != argument.RegBank)
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// ArgReg = argument.getReg()
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// Tmp = MRI.createNewVirtual(MRI.getSize(ArgReg), CurRegBank)
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// MIRBuilder.buildInstr(COPY, Tmp, ArgReg)
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// inst.getOperand(argument.getOperandNo()).setReg(Tmp)
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // End namespace llvm.
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#endif

‎llvm/include/llvm/InitializePasses.h

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void initializePromotePassPass(PassRegistry&);
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void initializePruneEHPass(PassRegistry&);
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void initializeReassociatePass(PassRegistry&);
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void initializeRegBankSelectPass(PassRegistry &);
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void initializeRegToMemPass(PassRegistry&);
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void initializeRegionInfoPassPass(PassRegistry&);
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void initializeRegionOnlyPrinterPass(PassRegistry&);

‎llvm/lib/CodeGen/GlobalISel/CMakeLists.txt

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set(GLOBAL_ISEL_FILES
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IRTranslator.cpp
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MachineIRBuilder.cpp
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RegBankSelect.cpp
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)
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# Add GlobalISel files to the dependencies if the user wants to build it.

‎llvm/lib/CodeGen/GlobalISel/GlobalISel.cpp

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void llvm::initializeGlobalISel(PassRegistry &Registry) {
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initializeIRTranslatorPass(Registry);
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initializeRegBankSelectPass(Registry);
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}
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#endif // LLVM_BUILD_GLOBAL_ISEL

‎llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp

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//===- llvm/CodeGen/GlobalISel/RegBankSelect.cpp - RegBankSelect -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the RegBankSelect class.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
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#define DEBUG_TYPE "regbankselect"
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using namespace llvm;
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char RegBankSelect::ID = 0;
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INITIALIZE_PASS(RegBankSelect, "regbankselect",
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"Assign register bank of generic virtual registers",
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false, false);
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RegBankSelect::RegBankSelect() : MachineFunctionPass(ID), RBI(nullptr) {
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initializeRegBankSelectPass(*PassRegistry::getPassRegistry());
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}
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bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) {
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// Avoid unused field member warning.
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(void)RBI;
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return false;
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}

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