[Mips][Disassembler] Add r6 tables to Mips64Disassembler checks

[vmedic]

Summary

Currently, disassembler test files for mips64r6 report errors for double word addition instructions(dadd, daddi). The resaon is that in command line options triple is set to mips instead of mips64. When this is changed error is reported for r6 instructions as the disassembler tables for them are not used. This patch adds r6 instructions to disassembler for mips64 and fixes the test files to use mips64 triple. Double word addition test cases are added also.

[dsanders]

Your change looks good to me but I think there's a better way to resolve this. I think it's wrong for us to have separate Mips32 and Mips64 disassemblers and for the target triple to have an effect on the behaviour (it should be the ELF header rather than the triple). I've uploaded http://reviews.llvm.org/D7498 which folds the two disassembler classes into a single class which I believe does the right thing for Mips32 and Mips64.

[vmedic]

Change abandoned as different approach has been implemented using http://reviews.llvm.org/D7498.

lib/Target/Mips/Disassembler/MipsDisassembler.cpp

   Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
                      bool bigEndian) :
     MipsDisassemblerBase(STI, Ctx, bigEndian) {}
-
+  bool hasMips64r6() const {
+    return STI.getFeatureBits() & Mips::FeatureMips64r6;
+  }
   DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
                               ArrayRef<uint8_t> Bytes, uint64_t Address,
                               raw_ostream &VStream,

   if (Result == MCDisassembler::Fail)
     return MCDisassembler::Fail;
 
+  if (hasMips64r6()) {
+    DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n");
+    Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, Instr, Insn,
+                               Address, this, STI);
+    if (Result != MCDisassembler::Fail) {
+      Size = 4;
+      return Result;
+    }
+    DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n");
+    Result = decodeInstruction(DecoderTableMips32r6_64r632, Instr, Insn,
+                 Address, this, STI);
+    if (Result != MCDisassembler::Fail) {
+      Size = 4;
+      return Result;
+    }
+  }
   // Calling the auto-generated decoder function.
   Result =
       decodeInstruction(DecoderTableMips6432, Instr, Insn, Address, this, STI);

test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt

-# RUN: llvm-mc %s -disassemble -triple=mipsel-unknown-linux -mcpu=mips64r6 | FileCheck %s
+# RUN: llvm-mc %s -disassemble -triple=mips64el-unknown-linux -mcpu=mips64r6 | FileCheck %s
 0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
 0x19 0x00 0x80 0xec # CHECK: addiupc $4, 100
 0x0a 0x00 0x29 0x25 # CHECK: addiu $9, $9, 10

 0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256
 0x25 0x04 0xa1 0x7c # CHECK: cache 1, 8($5)
 0x35 0x04 0xa1 0x7c # CHECK: pref 1, 8($5)
+0x9f 0x46 0x58 0x64 # CHECK: daddiu $24, $2, 18079
+0x3f 0x69 0x73 0x66 # CHECK: daddiu $19, $19, 26943
+0x5f 0xec 0x6f 0x65 # CHECK: daddiu $15, $11, -5025
+0xea 0x11 0xce 0x65 # CHECK: daddiu $14, $14, 4586

test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt

-# RUN: llvm-mc %s -disassemble -triple=mips-unknown-linux -mcpu=mips64r6 | FileCheck %s
+# RUN: llvm-mc %s -disassemble -triple=mips64-unknown-linux -mcpu=mips64r6 | FileCheck %s
 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
 0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10

 0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
 0x7c 0xa1 0x04 0x25 # CHECK: cache 1, 8($5)
 0x7c 0xa1 0x04 0x35 # CHECK: pref 1, 8($5)
+0x64 0x58 0x46 0x9f # CHECK: daddiu $24, $2, 18079
+0x66 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
+0x65 0x6f 0xec 0x5f # CHECK: daddiu $15, $11, -5025
+0x65 0xce 0x11 0xea # CHECK: daddiu $14, $14, 4586

test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt

 0x60 0xc0 0x00 0x40 # CHECK: bnec $6, $zero, 256
 0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 256
 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
-0x64 0x58 0x46 0x9f # CHECK: daddiu $24, $2, 18079
-0x66 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
-0x65 0x6f 0xec 0x5f # CHECK: daddiu $15, $11, -5025
-0x65 0xce 0x11 0xea # CHECK: daddiu $14, $14, 4586
 0x04 0x7e 0xab 0xcd # CHECK: dati $3, 43981