MachineVerifier: Allow undef reads if a matching superreg is defined.

[MatzeB]

Summary

Some pseudo instruction expansions break down a wide register use into
multiple uses of smaller sub registers. If the super register was
partially undefined the broken down sub registers may be completely
undefined now leading to MachineVerifier complaints. Unfortunately
liveness information to add the required dead flags is not easily
(cheaply) available when expanding pseudo instructions.

This commit changes the verifier to be quiet if there is an additional
implicit use of a super register. Pseudo instruction expanders can use
this to mark cases where partially defined values get potentially broken
into completely undefined ones.

[qcolombet]

Hi Matthias,

LGTM.
I guess this was failing only when sub register liveness will be enabled by default.
Could you add in the related PR the test case that we would need to commit to match-up this patch?

Thanks,
-Quentin

[MatzeB]

There are several test cases failing when enabling subregister liveness for the ARM target, you need this piece of code and an additional patch I haven't published yet to fix them. So I don't think this requires further tests.

Greetings

Matthias

[qcolombet]

SGTM.
Thanks for the clarifications.

Q.

llvm/trunk/lib/CodeGen/MachineVerifier.cpp

if (!regsLive.count(Reg)) {
           for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid();
                ++SubRegs) {
             if (regsLive.count(*SubRegs)) {
               Bad = false;
               break;
             }
           }
         }
+        // If there is an additional implicit-use of a super register we stop
+        // here. By definition we are fine if the super register is not
+        // (completely) dead, if the complete super register is dead we will
+        // get a report for its operand.
+        if (Bad) {
+          for (const MachineOperand &MOP : MI->uses()) {
+            if (!MOP.isReg())
+              continue;
+            if (!MOP.isImplicit())
+              continue;
+            for (MCSubRegIterator SubRegs(MOP.getReg(), TRI); SubRegs.isValid();
+                 ++SubRegs) {
+              if (*SubRegs == Reg) {
+                Bad = false;
+                break;
+              }
+            }
+          }
+        }
         if (Bad)
           report("Using an undefined physical register", MO, MONum);
       } else if (MRI->def_empty(Reg)) {
         report("Reading virtual register without a def", MO, MONum);
       } else {
         BBInfo &MInfo = MBBInfoMap[MI->getParent()];
         // We don't know which virtual registers are live in, so only complain
         // if vreg was killed in this MBB. Otherwise keep track of vregs that