[mips] Fix va_arg() for pointer types on big-endian N32.

[dsanders]

Summary

The Mips ABI's treat pointers in the same way as integers. They are
sign-extended to 32-bit for O32, and 64-bit for N32/N64. This doesn't matter
for O32 and N64 where pointers are already the correct width but it does matter
for big-endian N32, where pointers are 32-bit and need promoting.

The caller side is already passing pointers correctly. This patch corrects the
callee.

[atanasyan]

LGTM

[dsanders]

Committed to trunk in r225782. I'll give the buildbots some time to settle and let the 3.5.1 release finish before merging to release_35. The trunk generates slightly different (but equivalent) IR so I had to update the tests accordingly.

lib/CodeGen/CGExprScalar.cpp

Value *ScalarExprEmitter::VisitVAArgExpr(VAArgExpr *VE) {
   // If EmitVAArg fails, we fall back to the LLVM instruction.
   if (!ArgPtr)
     return Builder.CreateVAArg(ArgValue, ArgTy);
 
   // FIXME Volatility.
   llvm::Value *Val = Builder.CreateLoad(ArgPtr);
 
   // If EmitVAArg promoted the type, we must truncate it.
-  if (ArgTy != Val->getType())
+  if (ArgTy != Val->getType()) {
+    if (ArgTy->isPointerTy() && !Val->getType()->isPointerTy())
+      Val = Builder.CreateIntToPtr(Val, ArgTy);
+    else
       Val = Builder.CreateTrunc(Val, ArgTy);
+  }
 
   return Val;
 }
 
 Value *ScalarExprEmitter::VisitBlockExpr(const BlockExpr *block) {
   return CGF.EmitBlockLiteral(block);
 }
 

lib/CodeGen/TargetInfo.cpp

for (auto &I : FI.arguments())
     I.info = classifyArgumentType(I.type, Offset);
 }
 
 llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
                                     CodeGenFunction &CGF) const {
   llvm::Type *BP = CGF.Int8PtrTy;
   llvm::Type *BPP = CGF.Int8PtrPtrTy;
 
-  // Integer arguments are promoted 32-bit on O32 and 64-bit on N32/N64.
+  // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64.
+  // Pointers are also promoted in the same way but this only matters for N32.
   unsigned SlotSizeInBits = IsO32 ? 32 : 64;
-  if (Ty->isIntegerType() &&
-      CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) {
+  unsigned PtrWidth = getTarget().getPointerWidth(0);
+  if ((Ty->isIntegerType() &&
+          CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) ||
+      (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) {
     Ty = CGF.getContext().getIntTypeForBitwidth(SlotSizeInBits,
                                                 Ty->isSignedIntegerType());
   }
  
   CGBuilderTy &Builder = CGF.Builder;
   llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
   llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
   int64_t TypeAlign =
       std::min(getContext().getTypeAlign(Ty) / 8, StackAlignInBytes);
   llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
   llvm::Value *AddrTyped;
-  unsigned PtrWidth = getTarget().getPointerWidth(0);
   llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty;
 
   if (TypeAlign > MinABIStackAlignInBytes) {
     llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy);
     llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1);
     llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign);
     llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc);
     llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask);

test/CodeGen/mips-varargs.c

 //
 // O32:   [[ARG1:%.+]] = load i64* [[PTR3]], align 8
 // NEW:   [[ARG1:%.+]] = load i64* [[TMP0]], align 8
 //
 // ALL:   call void @llvm.va_end(i8* [[VA1]])
 // ALL:   ret i64 [[ARG1]]
 // ALL: }
 
+char *test_ptr(char *fmt, ...) {
+  va_list va;
+
+  va_start(va, fmt);
+  char *v = va_arg(va, char *);
+  va_end(va);
+
+  return v;
+}
+
+// ALL-LABEL: define i8* @test_ptr(i8*{{.*}} %fmt, ...)
+//
+// O32:   %va = alloca i8*, align [[PTRALIGN:4]]
+// N32:   %va = alloca i8*, align [[PTRALIGN:4]]
+// N64:   %va = alloca i8*, align [[PTRALIGN:8]]
+//
+// ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
+// ALL:   call void @llvm.va_start(i8* [[VA1]])
+//
+// ALL:   [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]]
+//
+// O32:   [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i8**
+// N32:   [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i64*
+// N64:   [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i8**
+//
+// O32:   [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], i32 4
+// NEW:   [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], {{i32|i64}} 8
+//
+// ALL:   store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
+//
+// O32:   [[ARG1:%.+]] = load i8** [[TMP0]], align 4
+// N32:   [[TMP2:%.+]] = load i64* [[TMP0]], align 8
+// N32:   [[TMP3:%.+]] = trunc i64 [[TMP2]] to i32
+// N32:   [[ARG1:%.+]] = inttoptr i32 [[TMP3]] to i8*
+// N64:   [[ARG1:%.+]] = load i8** [[TMP0]], align 8
+//
+// ALL:   call void @llvm.va_end(i8* [[VA1]])
+// ALL:   ret i8* [[ARG1]]
+// ALL: }
+
 int test_v4i32(char *fmt, ...) {
   va_list va;
 
   va_start(va, fmt);
   v4i32 v = va_arg(va, v4i32);
   va_end(va);
 
   return v[0];