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AVX-512 ERI Instrinsics for scalar instructions
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Authored by delena on Nov 23 2014, 6:13 AM.

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Summary

Added a full coverage for scalar ERI intrinsics, including SAE mode and memory operand.
Added AVX512_maskable_scalar template, that should cover all scalar instructions in the future.

The main difference between AVX512_maskable_scalar<> and AVX512_maskable<> is using X86select instead of vselect.
I need it, because I can't create vselect node for MVT::i1 mask for scalar instruction.

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Event Timeline

delena updated this revision to Diff 16538.Nov 23 2014, 6:13 AM
delena retitled this revision from to AVX-512 ERI Instrinsics for scalar instructions.
delena updated this object.
delena edited the test plan for this revision. (Show Details)
delena added reviewers: anemet, rob.khasanov.
delena set the repository for this revision to rL LLVM.
delena added a subscriber: Unknown Object (MLST).
anemet edited edge metadata.Dec 1 2014, 2:37 PM

Sorry about the delay responding, I was on vacation. I see you already committed this. I think this looks good. I just have a few comments that would be good to fix.

lib/Target/X86/X86ISelLowering.cpp
16802–16805

Please add comment, especially the difference from getVectorMaskingNode that you explained in the patch comment.

lib/Target/X86/X86InstrAVX512.td
26–31

I think that this needs a comment and a better name. This is more like the number of elements in the *RC* not in the VT, right?

You should probably also add a comment before X86VTVectorInfo that for scalar types in vector registers they are essentially treated as occupying the entire 128-bit vector register with the appropriate number of upper elements ignored (probably with some examples).

124–126

Why not FR32X and FR64X for RC?

Hi Adam, I'm sorry for the delay. I'm going to upload a new diff with all comments inside.

lib/Target/X86/X86InstrAVX512.td
124–126

I can't just change to FR32X, I have compilation errors in this case:

VRSQRT28SSrkz: (set FR32X:<empty>:$dst, (X86select:<empty> VK1WM:i1:$mask, (X86rsqrt28s:v4f32 FR32X:<empty>:$src1, FR32X:v4f32:$src2, (imm:i32)<<P:Predicate_FROUND_CURRENT>>), (bitconvert:v4f32 (build_vector:v4i32)<<P:Predicate_immAllZerosV>>)))
Included from lib/Target/X86/X86.td:432:
Included from lib/Target/X86/X86InstrInfo.td:2387:

lib/Target/X86/X86InstrAVX512.td:4253:3:** error: In VRSQRT28SSrkz: Type inference contradiction found, merging 'f32' into 'v4f32'**
defm VRSQRT28 : avx512_eri_s<0xCD, "vrsqrt28", X86rsqrt28s>, T8PD, EVEX_4V;

In this case I should rewrite the full conception of FP scalars, used also in AVX and AVX2. Not sure that it is what we need now.

anemet added inline comments.Dec 8 2014, 10:13 AM
lib/Target/X86/X86InstrAVX512.td
124–126

OK. I made this comment when I still thought that these _info object were wrapping the scalar types. A better way to think about them is the "closest" vector type so that masking can be applied.