Fix use-after-kill in TailDuplication

[loladiro]

Summary

If a register that was the result of a PHI instruction is killed in
the same basic block, TailDuplication sill tries to insert a COPY
at the end of the new basic block, causing a verifier failure like so (i.e. when run with llc -fast-isel -O3 -verify-machineinstrs):

*** Bad machine code: Using a killed virtual register ***
- function:    julia_anonymous1421
- basic block: BB#4 isf (0x17d84d0)
- instruction: %vreg12<def> = COPY %vreg7; GR64:%vreg12,%vreg7
- operand 1:   %vreg7

*** Bad machine code: Using a killed virtual register ***
- function:    julia_anonymous1421
- basic block: BB#6 notf (0x17d8630)
- instruction: %vreg14<def> = COPY %vreg6; GR64:%vreg14,%vreg6
- operand 1:   %vreg6
LLVM ERROR: Found 2 machine code errors.

[loladiro]

Looks like this was fixed in rL236782. @pete, I don't really know this code, do you think this still has any applicability or is this done?

[pete]

I think you're right that my patch fixed it, but yours is useful too.

I haven't looked too closely, but if you really are able to avoid adding entries to the Copies vector, then you are potentially reducing the work this pass does and speeding it up. You might even avoid creating useless copy instructions that DCE would later remove. So i'd try land this change too if you can.

Cheers,
Pete

lib/CodeGen/TailDuplication.cpp

for (MachineInstr &UseMI : MRI->use_instructions(Reg)) {
     if (UseMI.isDebugValue())
       continue;
     if (UseMI.getParent() != BB)
       return true;
   }
   return false;
 }
 
+static bool isKilledInBB(unsigned Reg, MachineBasicBlock *BB,
+    const MachineRegisterInfo *MRI)
+{
+  for (MachineOperand &MO : MRI->use_operands(Reg)) {
+    if (MO.getParent()->getParent() != BB)
+      continue;
+    if (MO.isKill())
+      return true;
+  }
+  return false;
+}
+
 static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
   for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
     if (MI->getOperand(i+1).getMBB() == SrcBB)
       return i;
   return 0;
 }
 
 
void TailDuplicatePass::ProcessPHI(
   assert(SrcOpIdx && "Unable to find matching PHI source?");
   unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
   const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
   LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
 
   // Insert a copy from source to the end of the block. The def register is the
   // available value liveout of the block.
   unsigned NewDef = MRI->createVirtualRegister(RC);
+  if (!isKilledInBB(DefReg, TailBB, MRI))
     Copies.push_back(std::make_pair(NewDef, SrcReg));
   if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg))
     AddSSAUpdateEntry(DefReg, NewDef, PredBB);
 
   if (!Remove)
     return;
 
   // Remove PredBB from the PHI node.
   MI->RemoveOperand(SrcOpIdx+1);

test/CodeGen/Generic/taildup-kill.ll

+; RUN: llc < %s -fast-isel -mcpu=core2 -O3 -verify-machineinstrs
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin14.0.0"
+
+%jl_value_t = type { %jl_value_t* }
+
+declare %jl_value_t* @jl_apply_generic()
+
+define void @julia_anonymous1421() {
+pass25:                                           ; preds = %L22
+  br i1 undef, label %L31, label %if23
+
+if23:                                             ; preds = %pass25
+  br i1 undef, label %ok27, label %fail17
+
+ok27:                                             ; preds = %if23
+  br i1 undef, label %ok29, label %fail17
+
+ok29:                                             ; preds = %ok27
+  br i1 undef, label %isf, label %notf
+
+isf:                                              ; preds = %ok29
+  %0 = getelementptr %jl_value_t** undef, i64 4
+  br label %mergef
+
+fail17:                                           ; preds = %ok16
+  unreachable
+
+notf:                                             ; preds = %ok29
+  %1 = call %jl_value_t* @jl_apply_generic()
+  br label %mergef
+
+mergef:                                           ; preds = %notf, %isf
+  %2 = phi %jl_value_t* [ undef, %isf ], [ %1, %notf ]
+  store %jl_value_t* %2, %jl_value_t** undef
+  br label %L34
+
+L31:                                              ; preds = %pass25
+  br i1 undef, label %ok33, label %fail17
+
+ok33:                                             ; preds = %L31
+  store %jl_value_t* undef, %jl_value_t** undef
+  br label %L34
+
+L34:                                              ; preds = %ok33, %mergef
+  unreachable
+
+}